cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-mt8195-cam.c (4826B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2//
      3// Copyright (c) 2021 MediaTek Inc.
      4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
      5
      6#include "clk-gate.h"
      7#include "clk-mtk.h"
      8
      9#include <dt-bindings/clock/mt8195-clk.h>
     10#include <linux/clk-provider.h>
     11#include <linux/platform_device.h>
     12
     13static const struct mtk_gate_regs cam_cg_regs = {
     14	.set_ofs = 0x4,
     15	.clr_ofs = 0x8,
     16	.sta_ofs = 0x0,
     17};
     18
     19#define GATE_CAM(_id, _name, _parent, _shift)			\
     20	GATE_MTK(_id, _name, _parent, &cam_cg_regs, _shift, &mtk_clk_gate_ops_setclr)
     21
     22static const struct mtk_gate cam_clks[] = {
     23	GATE_CAM(CLK_CAM_LARB13, "cam_larb13", "top_cam", 0),
     24	GATE_CAM(CLK_CAM_LARB14, "cam_larb14", "top_cam", 1),
     25	GATE_CAM(CLK_CAM_MAIN_CAM, "cam_main_cam", "top_cam", 3),
     26	GATE_CAM(CLK_CAM_MAIN_CAMTG, "cam_main_camtg", "top_cam", 4),
     27	GATE_CAM(CLK_CAM_SENINF, "cam_seninf", "top_cam", 5),
     28	GATE_CAM(CLK_CAM_GCAMSVA, "cam_gcamsva", "top_cam", 6),
     29	GATE_CAM(CLK_CAM_GCAMSVB, "cam_gcamsvb", "top_cam", 7),
     30	GATE_CAM(CLK_CAM_GCAMSVC, "cam_gcamsvc", "top_cam", 8),
     31	GATE_CAM(CLK_CAM_SCAMSA, "cam_scamsa", "top_cam", 9),
     32	GATE_CAM(CLK_CAM_SCAMSB, "cam_scamsb", "top_cam", 10),
     33	GATE_CAM(CLK_CAM_CAMSV_TOP, "cam_camsv_top", "top_cam", 11),
     34	GATE_CAM(CLK_CAM_CAMSV_CQ, "cam_camsv_cq", "top_cam", 12),
     35	GATE_CAM(CLK_CAM_ADL, "cam_adl", "top_cam", 16),
     36	GATE_CAM(CLK_CAM_ASG, "cam_asg", "top_cam", 17),
     37	GATE_CAM(CLK_CAM_PDA, "cam_pda", "top_cam", 18),
     38	GATE_CAM(CLK_CAM_FAKE_ENG, "cam_fake_eng", "top_cam", 19),
     39	GATE_CAM(CLK_CAM_MAIN_MRAW0, "cam_main_mraw0", "top_cam", 20),
     40	GATE_CAM(CLK_CAM_MAIN_MRAW1, "cam_main_mraw1", "top_cam", 21),
     41	GATE_CAM(CLK_CAM_MAIN_MRAW2, "cam_main_mraw2", "top_cam", 22),
     42	GATE_CAM(CLK_CAM_MAIN_MRAW3, "cam_main_mraw3", "top_cam", 23),
     43	GATE_CAM(CLK_CAM_CAM2MM0_GALS, "cam_cam2mm0_gals", "top_cam", 24),
     44	GATE_CAM(CLK_CAM_CAM2MM1_GALS, "cam_cam2mm1_gals", "top_cam", 25),
     45	GATE_CAM(CLK_CAM_CAM2SYS_GALS, "cam_cam2sys_gals", "top_cam", 26),
     46};
     47
     48static const struct mtk_gate cam_mraw_clks[] = {
     49	GATE_CAM(CLK_CAM_MRAW_LARBX, "cam_mraw_larbx", "top_cam", 0),
     50	GATE_CAM(CLK_CAM_MRAW_CAMTG, "cam_mraw_camtg", "top_cam", 2),
     51	GATE_CAM(CLK_CAM_MRAW_MRAW0, "cam_mraw_mraw0", "top_cam", 3),
     52	GATE_CAM(CLK_CAM_MRAW_MRAW1, "cam_mraw_mraw1", "top_cam", 4),
     53	GATE_CAM(CLK_CAM_MRAW_MRAW2, "cam_mraw_mraw2", "top_cam", 5),
     54	GATE_CAM(CLK_CAM_MRAW_MRAW3, "cam_mraw_mraw3", "top_cam", 6),
     55};
     56
     57static const struct mtk_gate cam_rawa_clks[] = {
     58	GATE_CAM(CLK_CAM_RAWA_LARBX, "cam_rawa_larbx", "top_cam", 0),
     59	GATE_CAM(CLK_CAM_RAWA_CAM, "cam_rawa_cam", "top_cam", 1),
     60	GATE_CAM(CLK_CAM_RAWA_CAMTG, "cam_rawa_camtg", "top_cam", 2),
     61};
     62
     63static const struct mtk_gate cam_rawb_clks[] = {
     64	GATE_CAM(CLK_CAM_RAWB_LARBX, "cam_rawb_larbx", "top_cam", 0),
     65	GATE_CAM(CLK_CAM_RAWB_CAM, "cam_rawb_cam", "top_cam", 1),
     66	GATE_CAM(CLK_CAM_RAWB_CAMTG, "cam_rawb_camtg", "top_cam", 2),
     67};
     68
     69static const struct mtk_gate cam_yuva_clks[] = {
     70	GATE_CAM(CLK_CAM_YUVA_LARBX, "cam_yuva_larbx", "top_cam", 0),
     71	GATE_CAM(CLK_CAM_YUVA_CAM, "cam_yuva_cam", "top_cam", 1),
     72	GATE_CAM(CLK_CAM_YUVA_CAMTG, "cam_yuva_camtg", "top_cam", 2),
     73};
     74
     75static const struct mtk_gate cam_yuvb_clks[] = {
     76	GATE_CAM(CLK_CAM_YUVB_LARBX, "cam_yuvb_larbx", "top_cam", 0),
     77	GATE_CAM(CLK_CAM_YUVB_CAM, "cam_yuvb_cam", "top_cam", 1),
     78	GATE_CAM(CLK_CAM_YUVB_CAMTG, "cam_yuvb_camtg", "top_cam", 2),
     79};
     80
     81static const struct mtk_clk_desc cam_desc = {
     82	.clks = cam_clks,
     83	.num_clks = ARRAY_SIZE(cam_clks),
     84};
     85
     86static const struct mtk_clk_desc cam_mraw_desc = {
     87	.clks = cam_mraw_clks,
     88	.num_clks = ARRAY_SIZE(cam_mraw_clks),
     89};
     90
     91static const struct mtk_clk_desc cam_rawa_desc = {
     92	.clks = cam_rawa_clks,
     93	.num_clks = ARRAY_SIZE(cam_rawa_clks),
     94};
     95
     96static const struct mtk_clk_desc cam_rawb_desc = {
     97	.clks = cam_rawb_clks,
     98	.num_clks = ARRAY_SIZE(cam_rawb_clks),
     99};
    100
    101static const struct mtk_clk_desc cam_yuva_desc = {
    102	.clks = cam_yuva_clks,
    103	.num_clks = ARRAY_SIZE(cam_yuva_clks),
    104};
    105
    106static const struct mtk_clk_desc cam_yuvb_desc = {
    107	.clks = cam_yuvb_clks,
    108	.num_clks = ARRAY_SIZE(cam_yuvb_clks),
    109};
    110
    111static const struct of_device_id of_match_clk_mt8195_cam[] = {
    112	{
    113		.compatible = "mediatek,mt8195-camsys",
    114		.data = &cam_desc,
    115	}, {
    116		.compatible = "mediatek,mt8195-camsys_mraw",
    117		.data = &cam_mraw_desc,
    118	}, {
    119		.compatible = "mediatek,mt8195-camsys_rawa",
    120		.data = &cam_rawa_desc,
    121	}, {
    122		.compatible = "mediatek,mt8195-camsys_rawb",
    123		.data = &cam_rawb_desc,
    124	}, {
    125		.compatible = "mediatek,mt8195-camsys_yuva",
    126		.data = &cam_yuva_desc,
    127	}, {
    128		.compatible = "mediatek,mt8195-camsys_yuvb",
    129		.data = &cam_yuvb_desc,
    130	}, {
    131		/* sentinel */
    132	}
    133};
    134
    135static struct platform_driver clk_mt8195_cam_drv = {
    136	.probe = mtk_clk_simple_probe,
    137	.remove = mtk_clk_simple_remove,
    138	.driver = {
    139		.name = "clk-mt8195-cam",
    140		.of_match_table = of_match_clk_mt8195_cam,
    141	},
    142};
    143builtin_platform_driver(clk_mt8195_cam_drv);