clk-mt8195-ccu.c (1298B)
1// SPDX-License-Identifier: GPL-2.0-only 2// 3// Copyright (c) 2021 MediaTek Inc. 4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com> 5 6#include "clk-gate.h" 7#include "clk-mtk.h" 8 9#include <dt-bindings/clock/mt8195-clk.h> 10#include <linux/clk-provider.h> 11#include <linux/platform_device.h> 12 13static const struct mtk_gate_regs ccu_cg_regs = { 14 .set_ofs = 0x4, 15 .clr_ofs = 0x8, 16 .sta_ofs = 0x0, 17}; 18 19#define GATE_CCU(_id, _name, _parent, _shift) \ 20 GATE_MTK(_id, _name, _parent, &ccu_cg_regs, _shift, &mtk_clk_gate_ops_setclr) 21 22static const struct mtk_gate ccu_clks[] = { 23 GATE_CCU(CLK_CCU_LARB18, "ccu_larb18", "top_ccu", 0), 24 GATE_CCU(CLK_CCU_AHB, "ccu_ahb", "top_ccu", 1), 25 GATE_CCU(CLK_CCU_CCU0, "ccu_ccu0", "top_ccu", 2), 26 GATE_CCU(CLK_CCU_CCU1, "ccu_ccu1", "top_ccu", 3), 27}; 28 29static const struct mtk_clk_desc ccu_desc = { 30 .clks = ccu_clks, 31 .num_clks = ARRAY_SIZE(ccu_clks), 32}; 33 34static const struct of_device_id of_match_clk_mt8195_ccu[] = { 35 { 36 .compatible = "mediatek,mt8195-ccusys", 37 .data = &ccu_desc, 38 }, { 39 /* sentinel */ 40 } 41}; 42 43static struct platform_driver clk_mt8195_ccu_drv = { 44 .probe = mtk_clk_simple_probe, 45 .remove = mtk_clk_simple_remove, 46 .driver = { 47 .name = "clk-mt8195-ccu", 48 .of_match_table = of_match_clk_mt8195_ccu, 49 }, 50}; 51builtin_platform_driver(clk_mt8195_ccu_drv);