cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-mt8195-imp_iic_wrap.c (2207B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2//
      3// Copyright (c) 2021 MediaTek Inc.
      4// Author: Chun-Jie Chen <chun-jie.chen@mediatek.com>
      5
      6#include "clk-gate.h"
      7#include "clk-mtk.h"
      8
      9#include <dt-bindings/clock/mt8195-clk.h>
     10#include <linux/clk-provider.h>
     11#include <linux/platform_device.h>
     12
     13static const struct mtk_gate_regs imp_iic_wrap_cg_regs = {
     14	.set_ofs = 0xe08,
     15	.clr_ofs = 0xe04,
     16	.sta_ofs = 0xe00,
     17};
     18
     19#define GATE_IMP_IIC_WRAP(_id, _name, _parent, _shift)				\
     20	GATE_MTK_FLAGS(_id, _name, _parent, &imp_iic_wrap_cg_regs, _shift,	\
     21		&mtk_clk_gate_ops_setclr, CLK_OPS_PARENT_ENABLE)
     22
     23static const struct mtk_gate imp_iic_wrap_s_clks[] = {
     24	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C5, "imp_iic_wrap_s_i2c5", "top_i2c", 0),
     25	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C6, "imp_iic_wrap_s_i2c6", "top_i2c", 1),
     26	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_S_I2C7, "imp_iic_wrap_s_i2c7", "top_i2c", 2),
     27};
     28
     29static const struct mtk_gate imp_iic_wrap_w_clks[] = {
     30	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C0, "imp_iic_wrap_w_i2c0", "top_i2c", 0),
     31	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C1, "imp_iic_wrap_w_i2c1", "top_i2c", 1),
     32	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C2, "imp_iic_wrap_w_i2c2", "top_i2c", 2),
     33	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C3, "imp_iic_wrap_w_i2c3", "top_i2c", 3),
     34	GATE_IMP_IIC_WRAP(CLK_IMP_IIC_WRAP_W_I2C4, "imp_iic_wrap_w_i2c4", "top_i2c", 4),
     35};
     36
     37static const struct mtk_clk_desc imp_iic_wrap_s_desc = {
     38	.clks = imp_iic_wrap_s_clks,
     39	.num_clks = ARRAY_SIZE(imp_iic_wrap_s_clks),
     40};
     41
     42static const struct mtk_clk_desc imp_iic_wrap_w_desc = {
     43	.clks = imp_iic_wrap_w_clks,
     44	.num_clks = ARRAY_SIZE(imp_iic_wrap_w_clks),
     45};
     46
     47static const struct of_device_id of_match_clk_mt8195_imp_iic_wrap[] = {
     48	{
     49		.compatible = "mediatek,mt8195-imp_iic_wrap_s",
     50		.data = &imp_iic_wrap_s_desc,
     51	}, {
     52		.compatible = "mediatek,mt8195-imp_iic_wrap_w",
     53		.data = &imp_iic_wrap_w_desc,
     54	}, {
     55		/* sentinel */
     56	}
     57};
     58
     59static struct platform_driver clk_mt8195_imp_iic_wrap_drv = {
     60	.probe = mtk_clk_simple_probe,
     61	.remove = mtk_clk_simple_remove,
     62	.driver = {
     63		.name = "clk-mt8195-imp_iic_wrap",
     64		.of_match_table = of_match_clk_mt8195_imp_iic_wrap,
     65	},
     66};
     67builtin_platform_driver(clk_mt8195_imp_iic_wrap_drv);