cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-mux.h (2557B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * Copyright (c) 2018 MediaTek Inc.
      4 * Author: Owen Chen <owen.chen@mediatek.com>
      5 */
      6
      7#ifndef __DRV_CLK_MTK_MUX_H
      8#define __DRV_CLK_MTK_MUX_H
      9
     10#include <linux/spinlock.h>
     11#include <linux/types.h>
     12
     13struct clk;
     14struct clk_hw_onecell_data;
     15struct clk_ops;
     16struct device_node;
     17
     18struct mtk_mux {
     19	int id;
     20	const char *name;
     21	const char * const *parent_names;
     22	unsigned int flags;
     23
     24	u32 mux_ofs;
     25	u32 set_ofs;
     26	u32 clr_ofs;
     27	u32 upd_ofs;
     28
     29	u8 mux_shift;
     30	u8 mux_width;
     31	u8 gate_shift;
     32	s8 upd_shift;
     33
     34	const struct clk_ops *ops;
     35	signed char num_parents;
     36};
     37
     38#define GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs,		\
     39			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     40			_gate, _upd_ofs, _upd, _flags, _ops) {		\
     41		.id = _id,						\
     42		.name = _name,						\
     43		.mux_ofs = _mux_ofs,					\
     44		.set_ofs = _mux_set_ofs,				\
     45		.clr_ofs = _mux_clr_ofs,				\
     46		.upd_ofs = _upd_ofs,					\
     47		.mux_shift = _shift,					\
     48		.mux_width = _width,					\
     49		.gate_shift = _gate,					\
     50		.upd_shift = _upd,					\
     51		.parent_names = _parents,				\
     52		.num_parents = ARRAY_SIZE(_parents),			\
     53		.flags = _flags,					\
     54		.ops = &_ops,						\
     55	}
     56
     57extern const struct clk_ops mtk_mux_clr_set_upd_ops;
     58extern const struct clk_ops mtk_mux_gate_clr_set_upd_ops;
     59
     60#define MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs,	\
     61			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     62			_gate, _upd_ofs, _upd, _flags)			\
     63		GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs,	\
     64			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     65			_gate, _upd_ofs, _upd, _flags,			\
     66			mtk_mux_gate_clr_set_upd_ops)
     67
     68#define MUX_GATE_CLR_SET_UPD(_id, _name, _parents, _mux_ofs,		\
     69			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     70			_gate, _upd_ofs, _upd)				\
     71		MUX_GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents,	\
     72			_mux_ofs, _mux_set_ofs, _mux_clr_ofs, _shift,	\
     73			_width, _gate, _upd_ofs, _upd,			\
     74			CLK_SET_RATE_PARENT)
     75
     76#define MUX_CLR_SET_UPD(_id, _name, _parents, _mux_ofs,			\
     77			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     78			_upd_ofs, _upd)					\
     79		GATE_CLR_SET_UPD_FLAGS(_id, _name, _parents, _mux_ofs,	\
     80			_mux_set_ofs, _mux_clr_ofs, _shift, _width,	\
     81			0, _upd_ofs, _upd, CLK_SET_RATE_PARENT,		\
     82			mtk_mux_clr_set_upd_ops)
     83
     84int mtk_clk_register_muxes(const struct mtk_mux *muxes,
     85			   int num, struct device_node *node,
     86			   spinlock_t *lock,
     87			   struct clk_hw_onecell_data *clk_data);
     88
     89void mtk_clk_unregister_muxes(const struct mtk_mux *muxes, int num,
     90			      struct clk_hw_onecell_data *clk_data);
     91
     92#endif /* __DRV_CLK_MTK_MUX_H */