cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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Kconfig (706B)


      1# SPDX-License-Identifier: GPL-2.0
      2config CLK_INTEL_SOCFPGA
      3	bool "Intel SoCFPGA family clock support" if COMPILE_TEST && !ARCH_INTEL_SOCFPGA
      4	default ARCH_INTEL_SOCFPGA
      5	help
      6	  Support for the clock controllers present on Intel SoCFPGA and eASIC
      7	  devices like Aria, Cyclone, Stratix 10, Agilex and N5X eASIC.
      8
      9if CLK_INTEL_SOCFPGA
     10
     11config CLK_INTEL_SOCFPGA32
     12	bool "Intel Aria / Cyclone clock controller support" if COMPILE_TEST && (!ARM || !ARCH_INTEL_SOCFPGA)
     13	default ARM && ARCH_INTEL_SOCFPGA
     14
     15config CLK_INTEL_SOCFPGA64
     16	bool "Intel Stratix / Agilex / N5X clock controller support" if COMPILE_TEST && (!ARM64 || !ARCH_INTEL_SOCFPGA)
     17	default ARM64 && ARCH_INTEL_SOCFPGA
     18
     19endif # CLK_INTEL_SOCFPGA