ccu-suniv-f1c100s.h (748B)
1/* SPDX-License-Identifier: GPL-2.0+ */ 2/* 3 * Copyright 2017 Icenowy Zheng <icenowy@aosc.io> 4 * 5 */ 6 7#ifndef _CCU_SUNIV_F1C100S_H_ 8#define _CCU_SUNIV_F1C100S_H_ 9 10#include <dt-bindings/clock/suniv-ccu-f1c100s.h> 11#include <dt-bindings/reset/suniv-ccu-f1c100s.h> 12 13#define CLK_PLL_CPU 0 14#define CLK_PLL_AUDIO_BASE 1 15#define CLK_PLL_AUDIO 2 16#define CLK_PLL_AUDIO_2X 3 17#define CLK_PLL_AUDIO_4X 4 18#define CLK_PLL_AUDIO_8X 5 19#define CLK_PLL_VIDEO 6 20#define CLK_PLL_VIDEO_2X 7 21#define CLK_PLL_VE 8 22#define CLK_PLL_DDR0 9 23#define CLK_PLL_PERIPH 10 24 25/* CPU clock is exported */ 26 27#define CLK_AHB 12 28#define CLK_APB 13 29 30/* All bus gates, DRAM gates and mod clocks are exported */ 31 32#define CLK_NUMBER (CLK_AVS + 1) 33 34#endif /* _CCU_SUNIV_F1C100S_H_ */