cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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interface.c (4340B)

      1/*
      2 * OMAP interface clock support
      3 *
      4 * Copyright (C) 2013 Texas Instruments, Inc.
      5 *
      6 * Tero Kristo <t-kristo@ti.com>
      7 *
      8 * This program is free software; you can redistribute it and/or modify
      9 * it under the terms of the GNU General Public License version 2 as
     10 * published by the Free Software Foundation.
     11 *
     12 * This program is distributed "as is" WITHOUT ANY WARRANTY of any
     13 * kind, whether express or implied; without even the implied warranty
     14 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
     15 * GNU General Public License for more details.
     16 */
     17
     18#include <linux/clk-provider.h>
     19#include <linux/slab.h>
     20#include <linux/of.h>
     21#include <linux/of_address.h>
     22#include <linux/clk/ti.h>
     23#include "clock.h"
     24
     25#undef pr_fmt
     26#define pr_fmt(fmt) "%s: " fmt, __func__
     27
     28static const struct clk_ops ti_interface_clk_ops = {
     29	.init		= &omap2_init_clk_clkdm,
     30	.enable		= &omap2_dflt_clk_enable,
     31	.disable	= &omap2_dflt_clk_disable,
     32	.is_enabled	= &omap2_dflt_clk_is_enabled,
     33};
     34
     35static struct clk *_register_interface(struct device *dev, const char *name,
     36				       const char *parent_name,
     37				       struct clk_omap_reg *reg, u8 bit_idx,
     38				       const struct clk_hw_omap_ops *ops)
     39{
     40	struct clk_init_data init = { NULL };
     41	struct clk_hw_omap *clk_hw;
     42	struct clk *clk;
     43
     44	clk_hw = kzalloc(sizeof(*clk_hw), GFP_KERNEL);
     45	if (!clk_hw)
     46		return ERR_PTR(-ENOMEM);
     47
     48	clk_hw->hw.init = &init;
     49	clk_hw->ops = ops;
     50	memcpy(&clk_hw->enable_reg, reg, sizeof(*reg));
     51	clk_hw->enable_bit = bit_idx;
     52
     53	init.name = name;
     54	init.ops = &ti_interface_clk_ops;
     55	init.flags = 0;
     56
     57	init.num_parents = 1;
     58	init.parent_names = &parent_name;
     59
     60	clk = ti_clk_register_omap_hw(NULL, &clk_hw->hw, name);
     61
     62	if (IS_ERR(clk))
     63		kfree(clk_hw);
     64
     65	return clk;
     66}
     67
     68static void __init _of_ti_interface_clk_setup(struct device_node *node,
     69					      const struct clk_hw_omap_ops *ops)
     70{
     71	struct clk *clk;
     72	const char *parent_name;
     73	struct clk_omap_reg reg;
     74	u8 enable_bit = 0;
     75	const char *name;
     76	u32 val;
     77
     78	if (ti_clk_get_reg_addr(node, 0, &reg))
     79		return;
     80
     81	if (!of_property_read_u32(node, "ti,bit-shift", &val))
     82		enable_bit = val;
     83
     84	parent_name = of_clk_get_parent_name(node, 0);
     85	if (!parent_name) {
     86		pr_err("%pOFn must have a parent\n", node);
     87		return;
     88	}
     89
     90	name = ti_dt_clk_name(node);
     91	clk = _register_interface(NULL, name, parent_name, &reg,
     92				  enable_bit, ops);
     93
     94	if (!IS_ERR(clk))
     95		of_clk_add_provider(node, of_clk_src_simple_get, clk);
     96}
     97
     98static void __init of_ti_interface_clk_setup(struct device_node *node)
     99{
    100	_of_ti_interface_clk_setup(node, &clkhwops_iclk_wait);
    101}
    102CLK_OF_DECLARE(ti_interface_clk, "ti,omap3-interface-clock",
    103	       of_ti_interface_clk_setup);
    104
    105static void __init of_ti_no_wait_interface_clk_setup(struct device_node *node)
    106{
    107	_of_ti_interface_clk_setup(node, &clkhwops_iclk);
    108}
    109CLK_OF_DECLARE(ti_no_wait_interface_clk, "ti,omap3-no-wait-interface-clock",
    110	       of_ti_no_wait_interface_clk_setup);
    111
    112#ifdef CONFIG_ARCH_OMAP3
    113static void __init of_ti_hsotgusb_interface_clk_setup(struct device_node *node)
    114{
    115	_of_ti_interface_clk_setup(node,
    116				   &clkhwops_omap3430es2_iclk_hsotgusb_wait);
    117}
    118CLK_OF_DECLARE(ti_hsotgusb_interface_clk, "ti,omap3-hsotgusb-interface-clock",
    119	       of_ti_hsotgusb_interface_clk_setup);
    120
    121static void __init of_ti_dss_interface_clk_setup(struct device_node *node)
    122{
    123	_of_ti_interface_clk_setup(node,
    124				   &clkhwops_omap3430es2_iclk_dss_usbhost_wait);
    125}
    126CLK_OF_DECLARE(ti_dss_interface_clk, "ti,omap3-dss-interface-clock",
    127	       of_ti_dss_interface_clk_setup);
    128
    129static void __init of_ti_ssi_interface_clk_setup(struct device_node *node)
    130{
    131	_of_ti_interface_clk_setup(node, &clkhwops_omap3430es2_iclk_ssi_wait);
    132}
    133CLK_OF_DECLARE(ti_ssi_interface_clk, "ti,omap3-ssi-interface-clock",
    134	       of_ti_ssi_interface_clk_setup);
    135
    136static void __init of_ti_am35xx_interface_clk_setup(struct device_node *node)
    137{
    138	_of_ti_interface_clk_setup(node, &clkhwops_am35xx_ipss_wait);
    139}
    140CLK_OF_DECLARE(ti_am35xx_interface_clk, "ti,am35xx-interface-clock",
    141	       of_ti_am35xx_interface_clk_setup);
    142#endif
    143
    144#ifdef CONFIG_SOC_OMAP2430
    145static void __init of_ti_omap2430_interface_clk_setup(struct device_node *node)
    146{
    147	_of_ti_interface_clk_setup(node, &clkhwops_omap2430_i2chs_wait);
    148}
    149CLK_OF_DECLARE(ti_omap2430_interface_clk, "ti,omap2430-interface-clock",
    150	       of_ti_omap2430_interface_clk_setup);
    151#endif