cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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clk-uniphier-mio.c (2478B)

      1// SPDX-License-Identifier: GPL-2.0-or-later
      2/*
      3 * Copyright (C) 2016 Socionext Inc.
      4 *   Author: Masahiro Yamada <yamada.masahiro@socionext.com>
      5 */
      6
      7#include <linux/stddef.h>
      8
      9#include "clk-uniphier.h"
     10
     11#define UNIPHIER_MIO_CLK_SD_FIXED					\
     12	UNIPHIER_CLK_FACTOR("sd-44m", -1, "sd-133m", 1, 3),		\
     13	UNIPHIER_CLK_FACTOR("sd-33m", -1, "sd-200m", 1, 6),		\
     14	UNIPHIER_CLK_FACTOR("sd-50m", -1, "sd-200m", 1, 4),		\
     15	UNIPHIER_CLK_FACTOR("sd-67m", -1, "sd-200m", 1, 3),		\
     16	UNIPHIER_CLK_FACTOR("sd-100m", -1, "sd-200m", 1, 2),		\
     17	UNIPHIER_CLK_FACTOR("sd-40m", -1, "sd-200m", 1, 5),		\
     18	UNIPHIER_CLK_FACTOR("sd-25m", -1, "sd-200m", 1, 8),		\
     19	UNIPHIER_CLK_FACTOR("sd-22m", -1, "sd-133m", 1, 6)
     20
     21#define UNIPHIER_MIO_CLK_SD(_idx, ch)					\
     22	{								\
     23		.name = "sd" #ch "-sel",				\
     24		.type = UNIPHIER_CLK_TYPE_MUX,				\
     25		.idx = -1,						\
     26		.data.mux = {						\
     27			.parent_names = {				\
     28				"sd-44m",				\
     29				"sd-33m",				\
     30				"sd-50m",				\
     31				"sd-67m",				\
     32				"sd-100m",				\
     33				"sd-40m",				\
     34				"sd-25m",				\
     35				"sd-22m",				\
     36			},						\
     37			.num_parents = 8,				\
     38			.reg = 0x30 + 0x200 * (ch),			\
     39			.masks = {					\
     40				0x00031000,				\
     41				0x00031000,				\
     42				0x00031000,				\
     43				0x00031000,				\
     44				0x00001300,				\
     45				0x00001300,				\
     46				0x00001300,				\
     47				0x00001300,				\
     48			},						\
     49			.vals = {					\
     50				0x00000000,				\
     51				0x00010000,				\
     52				0x00020000,				\
     53				0x00030000,				\
     54				0x00001000,				\
     55				0x00001100,				\
     56				0x00001200,				\
     57				0x00001300,				\
     58			},						\
     59		},							\
     60	},								\
     61	UNIPHIER_CLK_GATE("sd" #ch, (_idx), "sd" #ch "-sel", 0x20 + 0x200 * (ch), 8)
     62
     63#define UNIPHIER_MIO_CLK_USB2(idx, ch)					\
     64	UNIPHIER_CLK_GATE("usb2" #ch, (idx), "usb2", 0x20 + 0x200 * (ch), 28)
     65
     66#define UNIPHIER_MIO_CLK_USB2_PHY(idx, ch)				\
     67	UNIPHIER_CLK_GATE("usb2" #ch "-phy", (idx), "usb2", 0x20 + 0x200 * (ch), 29)
     68
     69const struct uniphier_clk_data uniphier_ld4_mio_clk_data[] = {
     70	UNIPHIER_MIO_CLK_SD_FIXED,
     71	UNIPHIER_MIO_CLK_SD(0, 0),
     72	UNIPHIER_MIO_CLK_SD(1, 1),
     73	UNIPHIER_MIO_CLK_SD(2, 2),
     74	UNIPHIER_CLK_GATE("miodmac", 7, NULL, 0x20, 25),
     75	UNIPHIER_MIO_CLK_USB2(8, 0),
     76	UNIPHIER_MIO_CLK_USB2(9, 1),
     77	UNIPHIER_MIO_CLK_USB2(10, 2),
     78	UNIPHIER_MIO_CLK_USB2_PHY(12, 0),
     79	UNIPHIER_MIO_CLK_USB2_PHY(13, 1),
     80	UNIPHIER_MIO_CLK_USB2_PHY(14, 2),
     81	{ /* sentinel */ }
     82};
     83
     84const struct uniphier_clk_data uniphier_pro5_sd_clk_data[] = {
     85	UNIPHIER_MIO_CLK_SD_FIXED,
     86	UNIPHIER_MIO_CLK_SD(0, 0),
     87	UNIPHIER_MIO_CLK_SD(1, 1),
     88	{ /* sentinel */ }
     89};