cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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reset.h (880B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Toshiba ARM SoC reset controller driver
      4 *
      5 * Copyright (c) 2021 TOSHIBA CORPORATION
      6 *
      7 * Nobuhiro Iwamatsu <nobuhiro1.iwamatsu@toshiba.co.jp>
      8 */
      9
     10#ifndef _VISCONTI_RESET_H_
     11#define _VISCONTI_RESET_H_
     12
     13#include <linux/reset-controller.h>
     14
     15struct visconti_reset_data {
     16	u32	rson_offset;
     17	u32	rsoff_offset;
     18	u8	rs_idx;
     19};
     20
     21struct visconti_reset {
     22	struct reset_controller_dev rcdev;
     23	struct regmap *regmap;
     24	const struct visconti_reset_data *resets;
     25	spinlock_t *lock;
     26};
     27
     28extern const struct reset_control_ops visconti_reset_ops;
     29
     30int visconti_register_reset_controller(struct device *dev,
     31				       struct regmap *regmap,
     32				       const struct visconti_reset_data *resets,
     33				       unsigned int num_resets,
     34				       const struct reset_control_ops *reset_ops,
     35				       spinlock_t *lock);
     36#endif /* _VISCONTI_RESET_H_ */