cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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timer-sp.h (1722B)


      1/* SPDX-License-Identifier: GPL-2.0 */
      2/*
      3 * ARM timer implementation, found in Integrator, Versatile and Realview
      4 * platforms.  Not all platforms support all registers and bits in these
      5 * registers, so we mark them with A for Integrator AP, C for Integrator
      6 * CP, V for Versatile and R for Realview.
      7 *
      8 * Integrator AP has 16-bit timers, Integrator CP, Versatile and Realview
      9 * can have 16-bit or 32-bit selectable via a bit in the control register.
     10 *
     11 * Every SP804 contains two identical timers.
     12 */
     13#define NR_TIMERS	2
     14#define TIMER_1_BASE	0x00
     15#define TIMER_2_BASE	0x20
     16
     17#define TIMER_LOAD	0x00			/* ACVR rw */
     18#define TIMER_VALUE	0x04			/* ACVR ro */
     19#define TIMER_CTRL	0x08			/* ACVR rw */
     20#define TIMER_CTRL_ONESHOT	(1 << 0)	/*  CVR */
     21#define TIMER_CTRL_32BIT	(1 << 1)	/*  CVR */
     22#define TIMER_CTRL_DIV1		(0 << 2)	/* ACVR */
     23#define TIMER_CTRL_DIV16	(1 << 2)	/* ACVR */
     24#define TIMER_CTRL_DIV256	(2 << 2)	/* ACVR */
     25#define TIMER_CTRL_IE		(1 << 5)	/*   VR */
     26#define TIMER_CTRL_PERIODIC	(1 << 6)	/* ACVR */
     27#define TIMER_CTRL_ENABLE	(1 << 7)	/* ACVR */
     28
     29#define TIMER_INTCLR	0x0c			/* ACVR wo */
     30#define TIMER_RIS	0x10			/*  CVR ro */
     31#define TIMER_MIS	0x14			/*  CVR ro */
     32#define TIMER_BGLOAD	0x18			/*  CVR rw */
     33
     34struct sp804_timer {
     35	int load;
     36	int load_h;
     37	int value;
     38	int value_h;
     39	int ctrl;
     40	int intclr;
     41	int ris;
     42	int mis;
     43	int bgload;
     44	int bgload_h;
     45	int timer_base[NR_TIMERS];
     46	int width;
     47};
     48
     49struct sp804_clkevt {
     50	void __iomem *base;
     51	void __iomem *load;
     52	void __iomem *load_h;
     53	void __iomem *value;
     54	void __iomem *value_h;
     55	void __iomem *ctrl;
     56	void __iomem *intclr;
     57	void __iomem *ris;
     58	void __iomem *mis;
     59	void __iomem *bgload;
     60	void __iomem *bgload_h;
     61	unsigned long reload;
     62	int width;
     63};