cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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chcr_crypto.h (10764B)


      1/*
      2 * This file is part of the Chelsio T6 Crypto driver for Linux.
      3 *
      4 * Copyright (c) 2003-2016 Chelsio Communications, Inc. All rights reserved.
      5 *
      6 * This software is available to you under a choice of one of two
      7 * licenses.  You may choose to be licensed under the terms of the GNU
      8 * General Public License (GPL) Version 2, available from the file
      9 * COPYING in the main directory of this source tree, or the
     10 * OpenIB.org BSD license below:
     11 *
     12 *     Redistribution and use in source and binary forms, with or
     13 *     without modification, are permitted provided that the following
     14 *     conditions are met:
     15 *
     16 *      - Redistributions of source code must retain the above
     17 *        copyright notice, this list of conditions and the following
     18 *        disclaimer.
     19 *
     20 *      - Redistributions in binary form must reproduce the above
     21 *        copyright notice, this list of conditions and the following
     22 *        disclaimer in the documentation and/or other materials
     23 *        provided with the distribution.
     24 *
     25 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     26 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     27 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
     28 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
     29 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
     30 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     31 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     32 * SOFTWARE.
     33 *
     34 */
     35
     36#ifndef __CHCR_CRYPTO_H__
     37#define __CHCR_CRYPTO_H__
     38
     39#define GHASH_BLOCK_SIZE    16
     40#define GHASH_DIGEST_SIZE   16
     41
     42#define CCM_B0_SIZE             16
     43#define CCM_AAD_FIELD_SIZE      2
     44// 511 - 16(For IV)
     45#define T6_MAX_AAD_SIZE 495
     46
     47
     48/* Define following if h/w is not dropping the AAD and IV data before
     49 * giving the processed data
     50 */
     51
     52#define CHCR_CRA_PRIORITY 500
     53#define CHCR_AEAD_PRIORITY 6000
     54#define CHCR_AES_MAX_KEY_LEN  (2 * (AES_MAX_KEY_SIZE)) /* consider xts */
     55#define CHCR_MAX_CRYPTO_IV_LEN 16 /* AES IV len */
     56
     57#define CHCR_MAX_AUTHENC_AES_KEY_LEN 32 /* max aes key length*/
     58#define CHCR_MAX_AUTHENC_SHA_KEY_LEN 128 /* max sha key length*/
     59
     60#define CHCR_GIVENCRYPT_OP 2
     61/* CPL/SCMD parameters */
     62
     63#define CHCR_ENCRYPT_OP 0
     64#define CHCR_DECRYPT_OP 1
     65
     66#define CHCR_SCMD_SEQ_NO_CTRL_32BIT     1
     67#define CHCR_SCMD_SEQ_NO_CTRL_48BIT     2
     68#define CHCR_SCMD_SEQ_NO_CTRL_64BIT     3
     69
     70#define CHCR_SCMD_PROTO_VERSION_GENERIC 4
     71
     72#define CHCR_SCMD_AUTH_CTRL_AUTH_CIPHER 0
     73#define CHCR_SCMD_AUTH_CTRL_CIPHER_AUTH 1
     74
     75#define CHCR_SCMD_CIPHER_MODE_NOP               0
     76#define CHCR_SCMD_CIPHER_MODE_AES_CBC           1
     77#define CHCR_SCMD_CIPHER_MODE_AES_GCM           2
     78#define CHCR_SCMD_CIPHER_MODE_AES_CTR           3
     79#define CHCR_SCMD_CIPHER_MODE_GENERIC_AES       4
     80#define CHCR_SCMD_CIPHER_MODE_AES_XTS           6
     81#define CHCR_SCMD_CIPHER_MODE_AES_CCM           7
     82
     83#define CHCR_SCMD_AUTH_MODE_NOP             0
     84#define CHCR_SCMD_AUTH_MODE_SHA1            1
     85#define CHCR_SCMD_AUTH_MODE_SHA224          2
     86#define CHCR_SCMD_AUTH_MODE_SHA256          3
     87#define CHCR_SCMD_AUTH_MODE_GHASH           4
     88#define CHCR_SCMD_AUTH_MODE_SHA512_224      5
     89#define CHCR_SCMD_AUTH_MODE_SHA512_256      6
     90#define CHCR_SCMD_AUTH_MODE_SHA512_384      7
     91#define CHCR_SCMD_AUTH_MODE_SHA512_512      8
     92#define CHCR_SCMD_AUTH_MODE_CBCMAC          9
     93#define CHCR_SCMD_AUTH_MODE_CMAC            10
     94
     95#define CHCR_SCMD_HMAC_CTRL_NOP             0
     96#define CHCR_SCMD_HMAC_CTRL_NO_TRUNC        1
     97#define CHCR_SCMD_HMAC_CTRL_TRUNC_RFC4366   2
     98#define CHCR_SCMD_HMAC_CTRL_IPSEC_96BIT     3
     99#define CHCR_SCMD_HMAC_CTRL_PL1		    4
    100#define CHCR_SCMD_HMAC_CTRL_PL2		    5
    101#define CHCR_SCMD_HMAC_CTRL_PL3		    6
    102#define CHCR_SCMD_HMAC_CTRL_DIV2	    7
    103#define VERIFY_HW 0
    104#define VERIFY_SW 1
    105
    106#define CHCR_SCMD_IVGEN_CTRL_HW             0
    107#define CHCR_SCMD_IVGEN_CTRL_SW             1
    108/* This are not really mac key size. They are intermediate values
    109 * of sha engine and its size
    110 */
    111#define CHCR_KEYCTX_MAC_KEY_SIZE_128        0
    112#define CHCR_KEYCTX_MAC_KEY_SIZE_160        1
    113#define CHCR_KEYCTX_MAC_KEY_SIZE_192        2
    114#define CHCR_KEYCTX_MAC_KEY_SIZE_256        3
    115#define CHCR_KEYCTX_MAC_KEY_SIZE_512        4
    116#define CHCR_KEYCTX_CIPHER_KEY_SIZE_128     0
    117#define CHCR_KEYCTX_CIPHER_KEY_SIZE_192     1
    118#define CHCR_KEYCTX_CIPHER_KEY_SIZE_256     2
    119#define CHCR_KEYCTX_NO_KEY                  15
    120
    121#define CHCR_CPL_FW4_PLD_IV_OFFSET          (5 * 64) /* bytes. flt #5 and #6 */
    122#define CHCR_CPL_FW4_PLD_HASH_RESULT_OFFSET (7 * 64) /* bytes. flt #7 */
    123#define CHCR_CPL_FW4_PLD_DATA_SIZE          (4 * 64) /* bytes. flt #4 to #7 */
    124
    125#define KEY_CONTEXT_HDR_SALT_AND_PAD	    16
    126#define flits_to_bytes(x)  (x * 8)
    127
    128#define IV_NOP                  0
    129#define IV_IMMEDIATE            1
    130#define IV_DSGL			2
    131
    132#define AEAD_H_SIZE             16
    133
    134#define CRYPTO_ALG_SUB_TYPE_MASK            0x0f000000
    135#define CRYPTO_ALG_SUB_TYPE_HASH_HMAC       0x01000000
    136#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4106    0x02000000
    137#define CRYPTO_ALG_SUB_TYPE_AEAD_GCM	    0x03000000
    138#define CRYPTO_ALG_SUB_TYPE_CBC_SHA	    0x04000000
    139#define CRYPTO_ALG_SUB_TYPE_AEAD_CCM        0x05000000
    140#define CRYPTO_ALG_SUB_TYPE_AEAD_RFC4309    0x06000000
    141#define CRYPTO_ALG_SUB_TYPE_CBC_NULL	    0x07000000
    142#define CRYPTO_ALG_SUB_TYPE_CTR             0x08000000
    143#define CRYPTO_ALG_SUB_TYPE_CTR_RFC3686     0x09000000
    144#define CRYPTO_ALG_SUB_TYPE_XTS		    0x0a000000
    145#define CRYPTO_ALG_SUB_TYPE_CBC		    0x0b000000
    146#define CRYPTO_ALG_SUB_TYPE_CTR_SHA	    0x0c000000
    147#define CRYPTO_ALG_SUB_TYPE_CTR_NULL   0x0d000000
    148#define CRYPTO_ALG_TYPE_HMAC (CRYPTO_ALG_TYPE_AHASH |\
    149			      CRYPTO_ALG_SUB_TYPE_HASH_HMAC)
    150
    151#define MAX_SCRATCH_PAD_SIZE    32
    152
    153#define CHCR_HASH_MAX_BLOCK_SIZE_64  64
    154#define CHCR_HASH_MAX_BLOCK_SIZE_128 128
    155#define CHCR_SRC_SG_SIZE (0x10000 - sizeof(int))
    156#define CHCR_DST_SG_SIZE 2048
    157
    158static inline struct chcr_context *a_ctx(struct crypto_aead *tfm)
    159{
    160	return crypto_aead_ctx(tfm);
    161}
    162
    163static inline struct chcr_context *c_ctx(struct crypto_skcipher *tfm)
    164{
    165	return crypto_skcipher_ctx(tfm);
    166}
    167
    168static inline struct chcr_context *h_ctx(struct crypto_ahash *tfm)
    169{
    170	return crypto_tfm_ctx(crypto_ahash_tfm(tfm));
    171}
    172
    173struct ablk_ctx {
    174	struct crypto_skcipher *sw_cipher;
    175	__be32 key_ctx_hdr;
    176	unsigned int enckey_len;
    177	unsigned char ciph_mode;
    178	u8 key[CHCR_AES_MAX_KEY_LEN];
    179	u8 nonce[4];
    180	u8 rrkey[AES_MAX_KEY_SIZE];
    181};
    182struct chcr_aead_reqctx {
    183	struct	sk_buff	*skb;
    184	dma_addr_t iv_dma;
    185	dma_addr_t b0_dma;
    186	unsigned int b0_len;
    187	unsigned int op;
    188	u16 imm;
    189	u16 verify;
    190	u16 txqidx;
    191	u16 rxqidx;
    192	u8 iv[CHCR_MAX_CRYPTO_IV_LEN + MAX_SCRATCH_PAD_SIZE];
    193	u8 *scratch_pad;
    194};
    195
    196struct ulptx_walk {
    197	struct ulptx_sgl *sgl;
    198	unsigned int nents;
    199	unsigned int pair_idx;
    200	unsigned int last_sg_len;
    201	struct scatterlist *last_sg;
    202	struct ulptx_sge_pair *pair;
    203
    204};
    205
    206struct dsgl_walk {
    207	unsigned int nents;
    208	unsigned int last_sg_len;
    209	struct scatterlist *last_sg;
    210	struct cpl_rx_phys_dsgl *dsgl;
    211	struct phys_sge_pairs *to;
    212};
    213
    214struct chcr_gcm_ctx {
    215	u8 ghash_h[AEAD_H_SIZE];
    216};
    217
    218struct chcr_authenc_ctx {
    219	u8 dec_rrkey[AES_MAX_KEY_SIZE];
    220	u8 h_iopad[2 * CHCR_HASH_MAX_DIGEST_SIZE];
    221	unsigned char auth_mode;
    222};
    223
    224struct __aead_ctx {
    225	union {
    226		DECLARE_FLEX_ARRAY(struct chcr_gcm_ctx, gcm);
    227		DECLARE_FLEX_ARRAY(struct chcr_authenc_ctx, authenc);
    228	};
    229};
    230
    231struct chcr_aead_ctx {
    232	__be32 key_ctx_hdr;
    233	unsigned int enckey_len;
    234	struct crypto_aead *sw_cipher;
    235	u8 salt[MAX_SALT];
    236	u8 key[CHCR_AES_MAX_KEY_LEN];
    237	u8 nonce[4];
    238	u16 hmac_ctrl;
    239	u16 mayverify;
    240	struct	__aead_ctx ctx[];
    241};
    242
    243struct hmac_ctx {
    244	struct crypto_shash *base_hash;
    245	u8 ipad[CHCR_HASH_MAX_BLOCK_SIZE_128];
    246	u8 opad[CHCR_HASH_MAX_BLOCK_SIZE_128];
    247};
    248
    249struct __crypto_ctx {
    250	union {
    251		DECLARE_FLEX_ARRAY(struct hmac_ctx, hmacctx);
    252		DECLARE_FLEX_ARRAY(struct ablk_ctx, ablkctx);
    253		DECLARE_FLEX_ARRAY(struct chcr_aead_ctx, aeadctx);
    254	};
    255};
    256
    257struct chcr_context {
    258	struct chcr_dev *dev;
    259	unsigned char rxq_perchan;
    260	unsigned char txq_perchan;
    261	unsigned int  ntxq;
    262	unsigned int  nrxq;
    263	struct completion cbc_aes_aio_done;
    264	struct __crypto_ctx crypto_ctx[];
    265};
    266
    267struct chcr_hctx_per_wr {
    268	struct scatterlist *srcsg;
    269	struct sk_buff *skb;
    270	dma_addr_t dma_addr;
    271	u32 dma_len;
    272	unsigned int src_ofst;
    273	unsigned int processed;
    274	u32 result;
    275	u8 is_sg_map;
    276	u8 imm;
    277	/*Final callback called. Driver cannot rely on nbytes to decide
    278	 * final call
    279	 */
    280	u8 isfinal;
    281};
    282
    283struct chcr_ahash_req_ctx {
    284	struct chcr_hctx_per_wr hctx_wr;
    285	u8 *reqbfr;
    286	u8 *skbfr;
    287	/* SKB which is being sent to the hardware for processing */
    288	u64 data_len;  /* Data len till time */
    289	u16 txqidx;
    290	u16 rxqidx;
    291	u8 reqlen;
    292	u8 partial_hash[CHCR_HASH_MAX_DIGEST_SIZE];
    293	u8 bfr1[CHCR_HASH_MAX_BLOCK_SIZE_128];
    294	u8 bfr2[CHCR_HASH_MAX_BLOCK_SIZE_128];
    295};
    296
    297struct chcr_skcipher_req_ctx {
    298	struct sk_buff *skb;
    299	struct scatterlist *dstsg;
    300	unsigned int processed;
    301	unsigned int last_req_len;
    302	unsigned int partial_req;
    303	struct scatterlist *srcsg;
    304	unsigned int src_ofst;
    305	unsigned int dst_ofst;
    306	unsigned int op;
    307	u16 imm;
    308	u8 iv[CHCR_MAX_CRYPTO_IV_LEN];
    309	u8 init_iv[CHCR_MAX_CRYPTO_IV_LEN];
    310	u16 txqidx;
    311	u16 rxqidx;
    312	struct skcipher_request fallback_req;	// keep at the end
    313};
    314
    315struct chcr_alg_template {
    316	u32 type;
    317	u32 is_registered;
    318	union {
    319		struct skcipher_alg skcipher;
    320		struct ahash_alg hash;
    321		struct aead_alg aead;
    322	} alg;
    323};
    324
    325typedef struct sk_buff *(*create_wr_t)(struct aead_request *req,
    326				       unsigned short qid,
    327				       int size);
    328
    329void chcr_verify_tag(struct aead_request *req, u8 *input, int *err);
    330int chcr_aead_dma_map(struct device *dev, struct aead_request *req,
    331		      unsigned short op_type);
    332void chcr_aead_dma_unmap(struct device *dev, struct aead_request *req,
    333			 unsigned short op_type);
    334void chcr_add_aead_dst_ent(struct aead_request *req,
    335			   struct cpl_rx_phys_dsgl *phys_cpl,
    336			   unsigned short qid);
    337void chcr_add_aead_src_ent(struct aead_request *req, struct ulptx_sgl *ulptx);
    338void chcr_add_cipher_src_ent(struct skcipher_request *req,
    339			     void *ulptx,
    340			     struct  cipher_wr_param *wrparam);
    341int chcr_cipher_dma_map(struct device *dev, struct skcipher_request *req);
    342void chcr_cipher_dma_unmap(struct device *dev, struct skcipher_request *req);
    343void chcr_add_cipher_dst_ent(struct skcipher_request *req,
    344			     struct cpl_rx_phys_dsgl *phys_cpl,
    345			     struct  cipher_wr_param *wrparam,
    346			     unsigned short qid);
    347int sg_nents_len_skip(struct scatterlist *sg, u64 len, u64 skip);
    348void chcr_add_hash_src_ent(struct ahash_request *req, struct ulptx_sgl *ulptx,
    349			   struct hash_wr_param *param);
    350int chcr_hash_dma_map(struct device *dev, struct ahash_request *req);
    351void chcr_hash_dma_unmap(struct device *dev, struct ahash_request *req);
    352void chcr_aead_common_exit(struct aead_request *req);
    353#endif /* __CHCR_CRYPTO_H__ */