hpre.h (2274B)
1/* SPDX-License-Identifier: GPL-2.0 */ 2/* Copyright (c) 2019 HiSilicon Limited. */ 3#ifndef __HISI_HPRE_H 4#define __HISI_HPRE_H 5 6#include <linux/list.h> 7#include <linux/hisi_acc_qm.h> 8 9#define HPRE_SQE_SIZE sizeof(struct hpre_sqe) 10#define HPRE_PF_DEF_Q_NUM 64 11#define HPRE_PF_DEF_Q_BASE 0 12 13/* 14 * type used in qm sqc DW6. 15 * 0 - Algorithm which has been supported in V2, like RSA, DH and so on; 16 * 1 - ECC algorithm in V3. 17 */ 18#define HPRE_V2_ALG_TYPE 0 19#define HPRE_V3_ECC_ALG_TYPE 1 20 21enum { 22 HPRE_CLUSTER0, 23 HPRE_CLUSTER1, 24 HPRE_CLUSTER2, 25 HPRE_CLUSTER3 26}; 27 28enum hpre_ctrl_dbgfs_file { 29 HPRE_CLEAR_ENABLE, 30 HPRE_CLUSTER_CTRL, 31 HPRE_DEBUG_FILE_NUM, 32}; 33 34enum hpre_dfx_dbgfs_file { 35 HPRE_SEND_CNT, 36 HPRE_RECV_CNT, 37 HPRE_SEND_FAIL_CNT, 38 HPRE_SEND_BUSY_CNT, 39 HPRE_OVER_THRHLD_CNT, 40 HPRE_OVERTIME_THRHLD, 41 HPRE_INVALID_REQ_CNT, 42 HPRE_DFX_FILE_NUM 43}; 44 45#define HPRE_CLUSTERS_NUM_V2 (HPRE_CLUSTER3 + 1) 46#define HPRE_CLUSTERS_NUM_V3 1 47#define HPRE_CLUSTERS_NUM_MAX HPRE_CLUSTERS_NUM_V2 48#define HPRE_DEBUGFS_FILE_NUM (HPRE_DEBUG_FILE_NUM + HPRE_CLUSTERS_NUM_MAX - 1) 49 50struct hpre_debugfs_file { 51 int index; 52 enum hpre_ctrl_dbgfs_file type; 53 spinlock_t lock; 54 struct hpre_debug *debug; 55}; 56 57struct hpre_dfx { 58 atomic64_t value; 59 enum hpre_dfx_dbgfs_file type; 60}; 61 62/* 63 * One HPRE controller has one PF and multiple VFs, some global configurations 64 * which PF has need this structure. 65 * Just relevant for PF. 66 */ 67struct hpre_debug { 68 struct hpre_dfx dfx[HPRE_DFX_FILE_NUM]; 69 struct hpre_debugfs_file files[HPRE_DEBUGFS_FILE_NUM]; 70}; 71 72struct hpre { 73 struct hisi_qm qm; 74 struct hpre_debug debug; 75 unsigned long status; 76}; 77 78enum hpre_alg_type { 79 HPRE_ALG_NC_NCRT = 0x0, 80 HPRE_ALG_NC_CRT = 0x1, 81 HPRE_ALG_KG_STD = 0x2, 82 HPRE_ALG_KG_CRT = 0x3, 83 HPRE_ALG_DH_G2 = 0x4, 84 HPRE_ALG_DH = 0x5, 85 HPRE_ALG_ECC_MUL = 0xD, 86 /* shared by x25519 and x448, but x448 is not supported now */ 87 HPRE_ALG_CURVE25519_MUL = 0x10, 88}; 89 90struct hpre_sqe { 91 __le32 dw0; 92 __u8 task_len1; 93 __u8 task_len2; 94 __u8 mrttest_num; 95 __u8 resv1; 96 __le64 key; 97 __le64 in; 98 __le64 out; 99 __le16 tag; 100 __le16 resv2; 101#define _HPRE_SQE_ALIGN_EXT 7 102 __le32 rsvd1[_HPRE_SQE_ALIGN_EXT]; 103}; 104 105struct hisi_qp *hpre_create_qp(u8 type); 106int hpre_algs_register(struct hisi_qm *qm); 107void hpre_algs_unregister(struct hisi_qm *qm); 108 109#endif