adf_common_drv.h (9552B)
1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2/* Copyright(c) 2014 - 2021 Intel Corporation */ 3#ifndef ADF_DRV_H 4#define ADF_DRV_H 5 6#include <linux/list.h> 7#include <linux/pci.h> 8#include "adf_accel_devices.h" 9#include "icp_qat_fw_loader_handle.h" 10#include "icp_qat_hal.h" 11 12#define ADF_MAJOR_VERSION 0 13#define ADF_MINOR_VERSION 6 14#define ADF_BUILD_VERSION 0 15#define ADF_DRV_VERSION __stringify(ADF_MAJOR_VERSION) "." \ 16 __stringify(ADF_MINOR_VERSION) "." \ 17 __stringify(ADF_BUILD_VERSION) 18 19#define ADF_STATUS_RESTARTING 0 20#define ADF_STATUS_STARTING 1 21#define ADF_STATUS_CONFIGURED 2 22#define ADF_STATUS_STARTED 3 23#define ADF_STATUS_AE_INITIALISED 4 24#define ADF_STATUS_AE_UCODE_LOADED 5 25#define ADF_STATUS_AE_STARTED 6 26#define ADF_STATUS_PF_RUNNING 7 27#define ADF_STATUS_IRQ_ALLOCATED 8 28 29enum adf_dev_reset_mode { 30 ADF_DEV_RESET_ASYNC = 0, 31 ADF_DEV_RESET_SYNC 32}; 33 34enum adf_event { 35 ADF_EVENT_INIT = 0, 36 ADF_EVENT_START, 37 ADF_EVENT_STOP, 38 ADF_EVENT_SHUTDOWN, 39 ADF_EVENT_RESTARTING, 40 ADF_EVENT_RESTARTED, 41}; 42 43struct service_hndl { 44 int (*event_hld)(struct adf_accel_dev *accel_dev, 45 enum adf_event event); 46 unsigned long init_status[ADF_DEVS_ARRAY_SIZE]; 47 unsigned long start_status[ADF_DEVS_ARRAY_SIZE]; 48 char *name; 49 struct list_head list; 50}; 51 52static inline int get_current_node(void) 53{ 54 return topology_physical_package_id(raw_smp_processor_id()); 55} 56 57int adf_service_register(struct service_hndl *service); 58int adf_service_unregister(struct service_hndl *service); 59 60int adf_dev_init(struct adf_accel_dev *accel_dev); 61int adf_dev_start(struct adf_accel_dev *accel_dev); 62void adf_dev_stop(struct adf_accel_dev *accel_dev); 63void adf_dev_shutdown(struct adf_accel_dev *accel_dev); 64 65void adf_devmgr_update_class_index(struct adf_hw_device_data *hw_data); 66void adf_clean_vf_map(bool); 67 68int adf_ctl_dev_register(void); 69void adf_ctl_dev_unregister(void); 70int adf_processes_dev_register(void); 71void adf_processes_dev_unregister(void); 72 73int adf_devmgr_add_dev(struct adf_accel_dev *accel_dev, 74 struct adf_accel_dev *pf); 75void adf_devmgr_rm_dev(struct adf_accel_dev *accel_dev, 76 struct adf_accel_dev *pf); 77struct list_head *adf_devmgr_get_head(void); 78struct adf_accel_dev *adf_devmgr_get_dev_by_id(u32 id); 79struct adf_accel_dev *adf_devmgr_get_first(void); 80struct adf_accel_dev *adf_devmgr_pci_to_accel_dev(struct pci_dev *pci_dev); 81int adf_devmgr_verify_id(u32 id); 82void adf_devmgr_get_num_dev(u32 *num); 83int adf_devmgr_in_reset(struct adf_accel_dev *accel_dev); 84int adf_dev_started(struct adf_accel_dev *accel_dev); 85int adf_dev_restarting_notify(struct adf_accel_dev *accel_dev); 86int adf_dev_restarted_notify(struct adf_accel_dev *accel_dev); 87int adf_ae_init(struct adf_accel_dev *accel_dev); 88int adf_ae_shutdown(struct adf_accel_dev *accel_dev); 89int adf_ae_fw_load(struct adf_accel_dev *accel_dev); 90void adf_ae_fw_release(struct adf_accel_dev *accel_dev); 91int adf_ae_start(struct adf_accel_dev *accel_dev); 92int adf_ae_stop(struct adf_accel_dev *accel_dev); 93 94extern const struct pci_error_handlers adf_err_handler; 95void adf_enable_aer(struct adf_accel_dev *accel_dev); 96void adf_disable_aer(struct adf_accel_dev *accel_dev); 97void adf_reset_sbr(struct adf_accel_dev *accel_dev); 98void adf_reset_flr(struct adf_accel_dev *accel_dev); 99void adf_dev_restore(struct adf_accel_dev *accel_dev); 100int adf_init_aer(void); 101void adf_exit_aer(void); 102int adf_init_admin_comms(struct adf_accel_dev *accel_dev); 103void adf_exit_admin_comms(struct adf_accel_dev *accel_dev); 104int adf_send_admin_init(struct adf_accel_dev *accel_dev); 105int adf_init_admin_pm(struct adf_accel_dev *accel_dev, u32 idle_delay); 106int adf_init_arb(struct adf_accel_dev *accel_dev); 107void adf_exit_arb(struct adf_accel_dev *accel_dev); 108void adf_update_ring_arb(struct adf_etr_ring_data *ring); 109 110int adf_dev_get(struct adf_accel_dev *accel_dev); 111void adf_dev_put(struct adf_accel_dev *accel_dev); 112int adf_dev_in_use(struct adf_accel_dev *accel_dev); 113int adf_init_etr_data(struct adf_accel_dev *accel_dev); 114void adf_cleanup_etr_data(struct adf_accel_dev *accel_dev); 115int qat_crypto_register(void); 116int qat_crypto_unregister(void); 117int qat_crypto_dev_config(struct adf_accel_dev *accel_dev); 118int qat_crypto_vf_dev_config(struct adf_accel_dev *accel_dev); 119struct qat_crypto_instance *qat_crypto_get_instance_node(int node); 120void qat_crypto_put_instance(struct qat_crypto_instance *inst); 121void qat_alg_callback(void *resp); 122void qat_alg_asym_callback(void *resp); 123int qat_algs_register(void); 124void qat_algs_unregister(void); 125int qat_asym_algs_register(void); 126void qat_asym_algs_unregister(void); 127 128int adf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 129void adf_isr_resource_free(struct adf_accel_dev *accel_dev); 130int adf_vf_isr_resource_alloc(struct adf_accel_dev *accel_dev); 131void adf_vf_isr_resource_free(struct adf_accel_dev *accel_dev); 132 133int adf_pfvf_comms_disabled(struct adf_accel_dev *accel_dev); 134 135int qat_hal_init(struct adf_accel_dev *accel_dev); 136void qat_hal_deinit(struct icp_qat_fw_loader_handle *handle); 137int qat_hal_start(struct icp_qat_fw_loader_handle *handle); 138void qat_hal_stop(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 139 unsigned int ctx_mask); 140void qat_hal_reset(struct icp_qat_fw_loader_handle *handle); 141int qat_hal_clr_reset(struct icp_qat_fw_loader_handle *handle); 142void qat_hal_set_live_ctx(struct icp_qat_fw_loader_handle *handle, 143 unsigned char ae, unsigned int ctx_mask); 144int qat_hal_check_ae_active(struct icp_qat_fw_loader_handle *handle, 145 unsigned int ae); 146int qat_hal_set_ae_lm_mode(struct icp_qat_fw_loader_handle *handle, 147 unsigned char ae, enum icp_qat_uof_regtype lm_type, 148 unsigned char mode); 149int qat_hal_set_ae_ctx_mode(struct icp_qat_fw_loader_handle *handle, 150 unsigned char ae, unsigned char mode); 151int qat_hal_set_ae_nn_mode(struct icp_qat_fw_loader_handle *handle, 152 unsigned char ae, unsigned char mode); 153void qat_hal_set_pc(struct icp_qat_fw_loader_handle *handle, 154 unsigned char ae, unsigned int ctx_mask, unsigned int upc); 155void qat_hal_wr_uwords(struct icp_qat_fw_loader_handle *handle, 156 unsigned char ae, unsigned int uaddr, 157 unsigned int words_num, u64 *uword); 158void qat_hal_wr_umem(struct icp_qat_fw_loader_handle *handle, unsigned char ae, 159 unsigned int uword_addr, unsigned int words_num, 160 unsigned int *data); 161int qat_hal_get_ins_num(void); 162int qat_hal_batch_wr_lm(struct icp_qat_fw_loader_handle *handle, 163 unsigned char ae, 164 struct icp_qat_uof_batch_init *lm_init_header); 165int qat_hal_init_gpr(struct icp_qat_fw_loader_handle *handle, 166 unsigned char ae, unsigned long ctx_mask, 167 enum icp_qat_uof_regtype reg_type, 168 unsigned short reg_num, unsigned int regdata); 169int qat_hal_init_wr_xfer(struct icp_qat_fw_loader_handle *handle, 170 unsigned char ae, unsigned long ctx_mask, 171 enum icp_qat_uof_regtype reg_type, 172 unsigned short reg_num, unsigned int regdata); 173int qat_hal_init_rd_xfer(struct icp_qat_fw_loader_handle *handle, 174 unsigned char ae, unsigned long ctx_mask, 175 enum icp_qat_uof_regtype reg_type, 176 unsigned short reg_num, unsigned int regdata); 177int qat_hal_init_nn(struct icp_qat_fw_loader_handle *handle, 178 unsigned char ae, unsigned long ctx_mask, 179 unsigned short reg_num, unsigned int regdata); 180int qat_hal_wr_lm(struct icp_qat_fw_loader_handle *handle, 181 unsigned char ae, unsigned short lm_addr, unsigned int value); 182void qat_hal_set_ae_tindex_mode(struct icp_qat_fw_loader_handle *handle, 183 unsigned char ae, unsigned char mode); 184int qat_uclo_wr_all_uimage(struct icp_qat_fw_loader_handle *handle); 185void qat_uclo_del_obj(struct icp_qat_fw_loader_handle *handle); 186int qat_uclo_wr_mimage(struct icp_qat_fw_loader_handle *handle, void *addr_ptr, 187 int mem_size); 188int qat_uclo_map_obj(struct icp_qat_fw_loader_handle *handle, 189 void *addr_ptr, u32 mem_size, char *obj_name); 190int qat_uclo_set_cfg_ae_mask(struct icp_qat_fw_loader_handle *handle, 191 unsigned int cfg_ae_mask); 192int adf_init_misc_wq(void); 193void adf_exit_misc_wq(void); 194bool adf_misc_wq_queue_work(struct work_struct *work); 195#if defined(CONFIG_PCI_IOV) 196int adf_sriov_configure(struct pci_dev *pdev, int numvfs); 197void adf_disable_sriov(struct adf_accel_dev *accel_dev); 198void adf_enable_vf2pf_interrupts(struct adf_accel_dev *accel_dev, u32 vf_mask); 199void adf_disable_all_vf2pf_interrupts(struct adf_accel_dev *accel_dev); 200bool adf_recv_and_handle_pf2vf_msg(struct adf_accel_dev *accel_dev); 201bool adf_recv_and_handle_vf2pf_msg(struct adf_accel_dev *accel_dev, u32 vf_nr); 202int adf_pf2vf_handle_pf_restarting(struct adf_accel_dev *accel_dev); 203void adf_enable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 204void adf_disable_pf2vf_interrupts(struct adf_accel_dev *accel_dev); 205void adf_schedule_vf2pf_handler(struct adf_accel_vf_info *vf_info); 206int adf_init_pf_wq(void); 207void adf_exit_pf_wq(void); 208int adf_init_vf_wq(void); 209void adf_exit_vf_wq(void); 210void adf_flush_vf_wq(struct adf_accel_dev *accel_dev); 211#else 212#define adf_sriov_configure NULL 213 214static inline void adf_disable_sriov(struct adf_accel_dev *accel_dev) 215{ 216} 217 218static inline int adf_init_pf_wq(void) 219{ 220 return 0; 221} 222 223static inline void adf_exit_pf_wq(void) 224{ 225} 226 227static inline int adf_init_vf_wq(void) 228{ 229 return 0; 230} 231 232static inline void adf_exit_vf_wq(void) 233{ 234} 235 236#endif 237 238static inline void __iomem *adf_get_pmisc_base(struct adf_accel_dev *accel_dev) 239{ 240 struct adf_hw_device_data *hw_data = accel_dev->hw_device; 241 struct adf_bar *pmisc; 242 243 pmisc = &GET_BARS(accel_dev)[hw_data->get_misc_bar_id(hw_data)]; 244 245 return pmisc->virt_addr; 246} 247 248#endif