adf_gen4_pm.h (1406B)
1/* SPDX-License-Identifier: (BSD-3-Clause OR GPL-2.0-only) */ 2/* Copyright(c) 2022 Intel Corporation */ 3#ifndef ADF_GEN4_PM_H 4#define ADF_GEN4_PM_H 5 6#include "adf_accel_devices.h" 7 8/* Power management registers */ 9#define ADF_GEN4_PM_HOST_MSG (0x50A01C) 10 11/* Power management */ 12#define ADF_GEN4_PM_POLL_DELAY_US 20 13#define ADF_GEN4_PM_POLL_TIMEOUT_US USEC_PER_SEC 14#define ADF_GEN4_PM_MSG_POLL_DELAY_US (10 * USEC_PER_MSEC) 15#define ADF_GEN4_PM_STATUS (0x50A00C) 16#define ADF_GEN4_PM_INTERRUPT (0x50A028) 17 18/* Power management source in ERRSOU2 and ERRMSK2 */ 19#define ADF_GEN4_PM_SOU BIT(18) 20 21#define ADF_GEN4_PM_IDLE_INT_EN BIT(18) 22#define ADF_GEN4_PM_THROTTLE_INT_EN BIT(19) 23#define ADF_GEN4_PM_DRV_ACTIVE BIT(20) 24#define ADF_GEN4_PM_INIT_STATE BIT(21) 25#define ADF_GEN4_PM_INT_EN_DEFAULT (ADF_GEN4_PM_IDLE_INT_EN | \ 26 ADF_GEN4_PM_THROTTLE_INT_EN) 27 28#define ADF_GEN4_PM_THR_STS BIT(0) 29#define ADF_GEN4_PM_IDLE_STS BIT(1) 30#define ADF_GEN4_PM_FW_INT_STS BIT(2) 31#define ADF_GEN4_PM_INT_STS_MASK (ADF_GEN4_PM_THR_STS | \ 32 ADF_GEN4_PM_IDLE_STS | \ 33 ADF_GEN4_PM_FW_INT_STS) 34 35#define ADF_GEN4_PM_MSG_PENDING BIT(0) 36#define ADF_GEN4_PM_MSG_PAYLOAD_BIT_MASK GENMASK(28, 1) 37 38#define ADF_GEN4_PM_DEFAULT_IDLE_FILTER (0x0) 39#define ADF_GEN4_PM_MAX_IDLE_FILTER (0x7) 40 41int adf_gen4_enable_pm(struct adf_accel_dev *accel_dev); 42bool adf_gen4_handle_pm_interrupt(struct adf_accel_dev *accel_dev); 43 44#endif