cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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pcdp.h (2608B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Definitions for PCDP-defined console devices
      4 *
      5 * For DIG64_HCDPv10a_01.pdf and DIG64_PCDPv20.pdf (v1.0a and v2.0 resp.),
      6 * please see <http://www.dig64.org/specifications/>
      7 *
      8 * (c) Copyright 2002, 2004 Hewlett-Packard Development Company, L.P.
      9 *	Khalid Aziz <khalid.aziz@hp.com>
     10 *	Bjorn Helgaas <bjorn.helgaas@hp.com>
     11 */
     12
     13#define PCDP_CONSOLE			0
     14#define PCDP_DEBUG			1
     15#define PCDP_CONSOLE_OUTPUT		2
     16#define PCDP_CONSOLE_INPUT		3
     17
     18#define PCDP_UART			(0 << 3)
     19#define PCDP_VGA			(1 << 3)
     20#define PCDP_USB			(2 << 3)
     21
     22/* pcdp_uart.type and pcdp_device.type */
     23#define PCDP_CONSOLE_UART		(PCDP_UART | PCDP_CONSOLE)
     24#define PCDP_DEBUG_UART			(PCDP_UART | PCDP_DEBUG)
     25#define PCDP_CONSOLE_VGA		(PCDP_VGA  | PCDP_CONSOLE_OUTPUT)
     26#define PCDP_CONSOLE_USB		(PCDP_USB  | PCDP_CONSOLE_INPUT)
     27
     28/* pcdp_uart.flags */
     29#define PCDP_UART_EDGE_SENSITIVE	(1 << 0)
     30#define PCDP_UART_ACTIVE_LOW		(1 << 1)
     31#define PCDP_UART_PRIMARY_CONSOLE	(1 << 2)
     32#define PCDP_UART_IRQ			(1 << 6) /* in pci_func for rev < 3 */
     33#define PCDP_UART_PCI			(1 << 7) /* in pci_func for rev < 3 */
     34
     35struct pcdp_uart {
     36	u8				type;
     37	u8				bits;
     38	u8				parity;
     39	u8				stop_bits;
     40	u8				pci_seg;
     41	u8				pci_bus;
     42	u8				pci_dev;
     43	u8				pci_func;
     44	u64				baud;
     45	struct acpi_generic_address	addr;
     46	u16				pci_dev_id;
     47	u16				pci_vendor_id;
     48	u32				gsi;
     49	u32				clock_rate;
     50	u8				pci_prog_intfc;
     51	u8				flags;
     52	u16				conout_index;
     53	u32				reserved;
     54} __attribute__((packed));
     55
     56#define PCDP_IF_PCI	1
     57
     58/* pcdp_if_pci.trans */
     59#define PCDP_PCI_TRANS_IOPORT	0x02
     60#define PCDP_PCI_TRANS_MMIO	0x01
     61
     62struct pcdp_if_pci {
     63	u8			interconnect;
     64	u8			reserved;
     65	u16			length;
     66	u8			segment;
     67	u8			bus;
     68	u8			dev;
     69	u8			fun;
     70	u16			dev_id;
     71	u16			vendor_id;
     72	u32			acpi_interrupt;
     73	u64			mmio_tra;
     74	u64			ioport_tra;
     75	u8			flags;
     76	u8			trans;
     77} __attribute__((packed));
     78
     79struct pcdp_vga {
     80	u8			count;		/* address space descriptors */
     81} __attribute__((packed));
     82
     83/* pcdp_device.flags */
     84#define PCDP_PRIMARY_CONSOLE	1
     85
     86struct pcdp_device {
     87	u8			type;
     88	u8			flags;
     89	u16			length;
     90	u16			efi_index;
     91	/* next data is pcdp_if_pci or pcdp_if_acpi (not yet supported) */
     92	/* next data is device specific type (currently only pcdp_vga) */
     93} __attribute__((packed));
     94
     95struct pcdp {
     96	u8			signature[4];
     97	u32			length;
     98	u8			rev;		/* PCDP v2.0 is rev 3 */
     99	u8			chksum;
    100	u8			oemid[6];
    101	u8			oem_tabid[8];
    102	u32			oem_rev;
    103	u8			creator_id[4];
    104	u32			creator_rev;
    105	u32			num_uarts;
    106	struct pcdp_uart	uart[];	/* actual size is num_uarts */
    107	/* remainder of table is pcdp_device structures */
    108} __attribute__((packed));