cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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fsi-master.h (5961B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * FSI master definitions. These comprise the core <--> master interface,
      4 * to allow the core to interact with the (hardware-specific) masters.
      5 *
      6 * Copyright (C) IBM Corporation 2016
      7 */
      8
      9#ifndef DRIVERS_FSI_MASTER_H
     10#define DRIVERS_FSI_MASTER_H
     11
     12#include <linux/device.h>
     13#include <linux/mutex.h>
     14
     15/*
     16 * Master registers
     17 *
     18 * These are used by hardware masters, such as the one in the FSP2, AST2600 and
     19 * the hub master in POWER processors.
     20 */
     21
     22/* Control Registers */
     23#define FSI_MMODE		0x0		/* R/W: mode */
     24#define FSI_MDLYR		0x4		/* R/W: delay */
     25#define FSI_MCRSP		0x8		/* R/W: clock rate */
     26#define FSI_MENP0		0x10		/* R/W: enable */
     27#define FSI_MLEVP0		0x18		/* R: plug detect */
     28#define FSI_MSENP0		0x18		/* S: Set enable */
     29#define FSI_MCENP0		0x20		/* C: Clear enable */
     30#define FSI_MAEB		0x70		/* R: Error address */
     31#define FSI_MVER		0x74		/* R: master version/type */
     32#define FSI_MSTAP0		0xd0		/* R: Port status */
     33#define FSI_MRESP0		0xd0		/* W: Port reset */
     34#define FSI_MESRB0		0x1d0		/* R: Master error status */
     35#define FSI_MRESB0		0x1d0		/* W: Reset bridge */
     36#define FSI_MSCSB0		0x1d4		/* R: Master sub command stack */
     37#define FSI_MATRB0		0x1d8		/* R: Master address trace */
     38#define FSI_MDTRB0		0x1dc		/* R: Master data trace */
     39#define FSI_MECTRL		0x2e0		/* W: Error control */
     40
     41/* MMODE: Mode control */
     42#define FSI_MMODE_EIP		0x80000000	/* Enable interrupt polling */
     43#define FSI_MMODE_ECRC		0x40000000	/* Enable error recovery */
     44#define FSI_MMODE_RELA		0x20000000	/* Enable relative address commands */
     45#define FSI_MMODE_EPC		0x10000000	/* Enable parity checking */
     46#define FSI_MMODE_P8_TO_LSB	0x00000010	/* Timeout value LSB */
     47						/*   MSB=1, LSB=0 is 0.8 ms */
     48						/*   MSB=0, LSB=1 is 0.9 ms */
     49#define FSI_MMODE_CRS0SHFT	18		/* Clk rate selection 0 shift */
     50#define FSI_MMODE_CRS0MASK	0x3ff		/* Clk rate selection 0 mask */
     51#define FSI_MMODE_CRS1SHFT	8		/* Clk rate selection 1 shift */
     52#define FSI_MMODE_CRS1MASK	0x3ff		/* Clk rate selection 1 mask */
     53
     54/* MRESB: Reset brindge */
     55#define FSI_MRESB_RST_GEN	0x80000000	/* General reset */
     56#define FSI_MRESB_RST_ERR	0x40000000	/* Error Reset */
     57
     58/* MRESP: Reset port */
     59#define FSI_MRESP_RST_ALL_MASTER 0x20000000	/* Reset all FSI masters */
     60#define FSI_MRESP_RST_ALL_LINK	0x10000000	/* Reset all FSI port contr. */
     61#define FSI_MRESP_RST_MCR	0x08000000	/* Reset FSI master reg. */
     62#define FSI_MRESP_RST_PYE	0x04000000	/* Reset FSI parity error */
     63#define FSI_MRESP_RST_ALL	0xfc000000	/* Reset any error */
     64
     65/* MECTRL: Error control */
     66#define FSI_MECTRL_EOAE		0x8000		/* Enable machine check when */
     67						/* master 0 in error */
     68#define FSI_MECTRL_P8_AUTO_TERM	0x4000		/* Auto terminate */
     69
     70#define FSI_HUB_LINK_OFFSET		0x80000
     71#define FSI_HUB_LINK_SIZE		0x80000
     72#define FSI_HUB_MASTER_MAX_LINKS	8
     73
     74/*
     75 * Protocol definitions
     76 *
     77 * These are used by low level masters that bit-bang out the protocol
     78 */
     79
     80/* Various protocol delays */
     81#define	FSI_ECHO_DELAY_CLOCKS	16	/* Number clocks for echo delay */
     82#define	FSI_SEND_DELAY_CLOCKS	16	/* Number clocks for send delay */
     83#define	FSI_PRE_BREAK_CLOCKS	50	/* Number clocks to prep for break */
     84#define	FSI_BREAK_CLOCKS	256	/* Number of clocks to issue break */
     85#define	FSI_POST_BREAK_CLOCKS	16000	/* Number clocks to set up cfam */
     86#define	FSI_INIT_CLOCKS		5000	/* Clock out any old data */
     87#define	FSI_MASTER_DPOLL_CLOCKS	50      /* < 21 will cause slave to hang */
     88#define	FSI_MASTER_EPOLL_CLOCKS	50      /* Number of clocks for E_POLL retry */
     89
     90/* Various retry maximums */
     91#define FSI_CRC_ERR_RETRIES	10
     92#define	FSI_MASTER_MAX_BUSY	200
     93#define	FSI_MASTER_MTOE_COUNT	1000
     94
     95/* Command encodings */
     96#define	FSI_CMD_DPOLL		0x2
     97#define	FSI_CMD_EPOLL		0x3
     98#define	FSI_CMD_TERM		0x3f
     99#define FSI_CMD_ABS_AR		0x4
    100#define FSI_CMD_REL_AR		0x5
    101#define FSI_CMD_SAME_AR		0x3	/* but only a 2-bit opcode... */
    102
    103/* Slave responses */
    104#define	FSI_RESP_ACK		0	/* Success */
    105#define	FSI_RESP_BUSY		1	/* Slave busy */
    106#define	FSI_RESP_ERRA		2	/* Any (misc) Error */
    107#define	FSI_RESP_ERRC		3	/* Slave reports master CRC error */
    108
    109/* Misc */
    110#define	FSI_CRC_SIZE		4
    111
    112/* fsi-master definition and flags */
    113#define FSI_MASTER_FLAG_SWCLOCK		0x1
    114
    115/*
    116 * Structures and function prototypes
    117 *
    118 * These are common to all masters
    119 */
    120
    121struct fsi_master {
    122	struct device	dev;
    123	int		idx;
    124	int		n_links;
    125	int		flags;
    126	struct mutex	scan_lock;
    127	int		(*read)(struct fsi_master *, int link, uint8_t id,
    128				uint32_t addr, void *val, size_t size);
    129	int		(*write)(struct fsi_master *, int link, uint8_t id,
    130				uint32_t addr, const void *val, size_t size);
    131	int		(*term)(struct fsi_master *, int link, uint8_t id);
    132	int		(*send_break)(struct fsi_master *, int link);
    133	int		(*link_enable)(struct fsi_master *, int link,
    134				       bool enable);
    135	int		(*link_config)(struct fsi_master *, int link,
    136				       u8 t_send_delay, u8 t_echo_delay);
    137};
    138
    139#define dev_to_fsi_master(d) container_of(d, struct fsi_master, dev)
    140
    141/**
    142 * fsi_master registration & lifetime: the fsi_master_register() and
    143 * fsi_master_unregister() functions will take ownership of the master, and
    144 * ->dev in particular. The registration path performs a get_device(), which
    145 * takes the first reference on the device. Similarly, the unregistration path
    146 * performs a put_device(), which may well drop the last reference.
    147 *
    148 * This means that master implementations *may* need to hold their own
    149 * reference (via get_device()) on master->dev. In particular, if the device's
    150 * ->release callback frees the fsi_master, then fsi_master_unregister will
    151 * invoke this free if no other reference is held.
    152 *
    153 * The same applies for the error path of fsi_master_register; if the call
    154 * fails, dev->release will have been invoked.
    155 */
    156extern int fsi_master_register(struct fsi_master *master);
    157extern void fsi_master_unregister(struct fsi_master *master);
    158
    159extern int fsi_master_rescan(struct fsi_master *master);
    160
    161#endif /* DRIVERS_FSI_MASTER_H */