cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-sl28cpld.c (3975B)

      1// SPDX-License-Identifier: GPL-2.0-only
      2/*
      3 * sl28cpld GPIO driver
      4 *
      5 * Copyright 2020 Michael Walle <michael@walle.cc>
      6 */
      7
      8#include <linux/device.h>
      9#include <linux/gpio/driver.h>
     10#include <linux/gpio/regmap.h>
     11#include <linux/interrupt.h>
     12#include <linux/kernel.h>
     13#include <linux/mod_devicetable.h>
     14#include <linux/module.h>
     15#include <linux/platform_device.h>
     16#include <linux/regmap.h>
     17
     18/* GPIO flavor */
     19#define GPIO_REG_DIR	0x00
     20#define GPIO_REG_OUT	0x01
     21#define GPIO_REG_IN	0x02
     22#define GPIO_REG_IE	0x03
     23#define GPIO_REG_IP	0x04
     24
     25/* input-only flavor */
     26#define GPI_REG_IN	0x00
     27
     28/* output-only flavor */
     29#define GPO_REG_OUT	0x00
     30
     31enum sl28cpld_gpio_type {
     32	SL28CPLD_GPIO = 1,
     33	SL28CPLD_GPI,
     34	SL28CPLD_GPO,
     35};
     36
     37static const struct regmap_irq sl28cpld_gpio_irqs[] = {
     38	REGMAP_IRQ_REG_LINE(0, 8),
     39	REGMAP_IRQ_REG_LINE(1, 8),
     40	REGMAP_IRQ_REG_LINE(2, 8),
     41	REGMAP_IRQ_REG_LINE(3, 8),
     42	REGMAP_IRQ_REG_LINE(4, 8),
     43	REGMAP_IRQ_REG_LINE(5, 8),
     44	REGMAP_IRQ_REG_LINE(6, 8),
     45	REGMAP_IRQ_REG_LINE(7, 8),
     46};
     47
     48static int sl28cpld_gpio_irq_init(struct platform_device *pdev,
     49				  unsigned int base,
     50				  struct gpio_regmap_config *config)
     51{
     52	struct regmap_irq_chip_data *irq_data;
     53	struct regmap_irq_chip *irq_chip;
     54	struct device *dev = &pdev->dev;
     55	int irq, ret;
     56
     57	if (!device_property_read_bool(dev, "interrupt-controller"))
     58		return 0;
     59
     60	irq = platform_get_irq(pdev, 0);
     61	if (irq < 0)
     62		return irq;
     63
     64	irq_chip = devm_kzalloc(dev, sizeof(*irq_chip), GFP_KERNEL);
     65	if (!irq_chip)
     66		return -ENOMEM;
     67
     68	irq_chip->name = "sl28cpld-gpio-irq";
     69	irq_chip->irqs = sl28cpld_gpio_irqs;
     70	irq_chip->num_irqs = ARRAY_SIZE(sl28cpld_gpio_irqs);
     71	irq_chip->num_regs = 1;
     72	irq_chip->status_base = base + GPIO_REG_IP;
     73	irq_chip->mask_base = base + GPIO_REG_IE;
     74	irq_chip->mask_invert = true;
     75	irq_chip->ack_base = base + GPIO_REG_IP;
     76
     77	ret = devm_regmap_add_irq_chip_fwnode(dev, dev_fwnode(dev),
     78					      config->regmap, irq,
     79					      IRQF_SHARED | IRQF_ONESHOT,
     80					      0, irq_chip, &irq_data);
     81	if (ret)
     82		return ret;
     83
     84	config->irq_domain = regmap_irq_get_domain(irq_data);
     85
     86	return 0;
     87}
     88
     89static int sl28cpld_gpio_probe(struct platform_device *pdev)
     90{
     91	struct gpio_regmap_config config = {0};
     92	enum sl28cpld_gpio_type type;
     93	struct regmap *regmap;
     94	u32 base;
     95	int ret;
     96
     97	if (!pdev->dev.parent)
     98		return -ENODEV;
     99
    100	type = (uintptr_t)device_get_match_data(&pdev->dev);
    101	if (!type)
    102		return -ENODEV;
    103
    104	ret = device_property_read_u32(&pdev->dev, "reg", &base);
    105	if (ret)
    106		return -EINVAL;
    107
    108	regmap = dev_get_regmap(pdev->dev.parent, NULL);
    109	if (!regmap)
    110		return -ENODEV;
    111
    112	config.regmap = regmap;
    113	config.parent = &pdev->dev;
    114	config.ngpio = 8;
    115
    116	switch (type) {
    117	case SL28CPLD_GPIO:
    118		config.reg_dat_base = base + GPIO_REG_IN;
    119		config.reg_set_base = base + GPIO_REG_OUT;
    120		/* reg_dir_out_base might be zero */
    121		config.reg_dir_out_base = GPIO_REGMAP_ADDR(base + GPIO_REG_DIR);
    122
    123		/* This type supports interrupts */
    124		ret = sl28cpld_gpio_irq_init(pdev, base, &config);
    125		if (ret)
    126			return ret;
    127		break;
    128	case SL28CPLD_GPO:
    129		config.reg_set_base = base + GPO_REG_OUT;
    130		break;
    131	case SL28CPLD_GPI:
    132		config.reg_dat_base = base + GPI_REG_IN;
    133		break;
    134	default:
    135		dev_err(&pdev->dev, "unknown type %d\n", type);
    136		return -ENODEV;
    137	}
    138
    139	return PTR_ERR_OR_ZERO(devm_gpio_regmap_register(&pdev->dev, &config));
    140}
    141
    142static const struct of_device_id sl28cpld_gpio_of_match[] = {
    143	{ .compatible = "kontron,sl28cpld-gpio", .data = (void *)SL28CPLD_GPIO },
    144	{ .compatible = "kontron,sl28cpld-gpi", .data = (void *)SL28CPLD_GPI },
    145	{ .compatible = "kontron,sl28cpld-gpo", .data = (void *)SL28CPLD_GPO },
    146	{}
    147};
    148MODULE_DEVICE_TABLE(of, sl28cpld_gpio_of_match);
    149
    150static struct platform_driver sl28cpld_gpio_driver = {
    151	.probe = sl28cpld_gpio_probe,
    152	.driver = {
    153		.name = "sl28cpld-gpio",
    154		.of_match_table = sl28cpld_gpio_of_match,
    155	},
    156};
    157module_platform_driver(sl28cpld_gpio_driver);
    158
    159MODULE_DESCRIPTION("sl28cpld GPIO Driver");
    160MODULE_AUTHOR("Michael Walle <michael@walle.cc>");
    161MODULE_LICENSE("GPL");