cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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gpio-spear-spics.c (5153B)


      1/*
      2 * SPEAr platform SPI chipselect abstraction over gpiolib
      3 *
      4 * Copyright (C) 2012 ST Microelectronics
      5 * Shiraz Hashim <shiraz.linux.kernel@gmail.com>
      6 *
      7 * This file is licensed under the terms of the GNU General Public
      8 * License version 2. This program is licensed "as is" without any
      9 * warranty of any kind, whether express or implied.
     10 */
     11
     12#include <linux/err.h>
     13#include <linux/gpio/driver.h>
     14#include <linux/io.h>
     15#include <linux/init.h>
     16#include <linux/of.h>
     17#include <linux/platform_device.h>
     18#include <linux/types.h>
     19
     20/* maximum chipselects */
     21#define NUM_OF_GPIO	4
     22
     23/*
     24 * Provision is available on some SPEAr SoCs to control ARM PL022 spi cs
     25 * through system registers. This register lies outside spi (pl022)
     26 * address space into system registers.
     27 *
     28 * It provides control for spi chip select lines so that any chipselect
     29 * (out of 4 possible chipselects in pl022) can be made low to select
     30 * the particular slave.
     31 */
     32
     33/**
     34 * struct spear_spics - represents spi chip select control
     35 * @base: base address
     36 * @perip_cfg: configuration register
     37 * @sw_enable_bit: bit to enable s/w control over chipselects
     38 * @cs_value_bit: bit to program high or low chipselect
     39 * @cs_enable_mask: mask to select bits required to select chipselect
     40 * @cs_enable_shift: bit pos of cs_enable_mask
     41 * @use_count: use count of a spi controller cs lines
     42 * @last_off: stores last offset caller of set_value()
     43 * @chip: gpio_chip abstraction
     44 */
     45struct spear_spics {
     46	void __iomem		*base;
     47	u32			perip_cfg;
     48	u32			sw_enable_bit;
     49	u32			cs_value_bit;
     50	u32			cs_enable_mask;
     51	u32			cs_enable_shift;
     52	unsigned long		use_count;
     53	int			last_off;
     54	struct gpio_chip	chip;
     55};
     56
     57/* gpio framework specific routines */
     58static int spics_get_value(struct gpio_chip *chip, unsigned offset)
     59{
     60	return -ENXIO;
     61}
     62
     63static void spics_set_value(struct gpio_chip *chip, unsigned offset, int value)
     64{
     65	struct spear_spics *spics = gpiochip_get_data(chip);
     66	u32 tmp;
     67
     68	/* select chip select from register */
     69	tmp = readl_relaxed(spics->base + spics->perip_cfg);
     70	if (spics->last_off != offset) {
     71		spics->last_off = offset;
     72		tmp &= ~(spics->cs_enable_mask << spics->cs_enable_shift);
     73		tmp |= offset << spics->cs_enable_shift;
     74	}
     75
     76	/* toggle chip select line */
     77	tmp &= ~(0x1 << spics->cs_value_bit);
     78	tmp |= value << spics->cs_value_bit;
     79	writel_relaxed(tmp, spics->base + spics->perip_cfg);
     80}
     81
     82static int spics_direction_input(struct gpio_chip *chip, unsigned offset)
     83{
     84	return -ENXIO;
     85}
     86
     87static int spics_direction_output(struct gpio_chip *chip, unsigned offset,
     88		int value)
     89{
     90	spics_set_value(chip, offset, value);
     91	return 0;
     92}
     93
     94static int spics_request(struct gpio_chip *chip, unsigned offset)
     95{
     96	struct spear_spics *spics = gpiochip_get_data(chip);
     97	u32 tmp;
     98
     99	if (!spics->use_count++) {
    100		tmp = readl_relaxed(spics->base + spics->perip_cfg);
    101		tmp |= 0x1 << spics->sw_enable_bit;
    102		tmp |= 0x1 << spics->cs_value_bit;
    103		writel_relaxed(tmp, spics->base + spics->perip_cfg);
    104	}
    105
    106	return 0;
    107}
    108
    109static void spics_free(struct gpio_chip *chip, unsigned offset)
    110{
    111	struct spear_spics *spics = gpiochip_get_data(chip);
    112	u32 tmp;
    113
    114	if (!--spics->use_count) {
    115		tmp = readl_relaxed(spics->base + spics->perip_cfg);
    116		tmp &= ~(0x1 << spics->sw_enable_bit);
    117		writel_relaxed(tmp, spics->base + spics->perip_cfg);
    118	}
    119}
    120
    121static int spics_gpio_probe(struct platform_device *pdev)
    122{
    123	struct device_node *np = pdev->dev.of_node;
    124	struct spear_spics *spics;
    125
    126	spics = devm_kzalloc(&pdev->dev, sizeof(*spics), GFP_KERNEL);
    127	if (!spics)
    128		return -ENOMEM;
    129
    130	spics->base = devm_platform_ioremap_resource(pdev, 0);
    131	if (IS_ERR(spics->base))
    132		return PTR_ERR(spics->base);
    133
    134	if (of_property_read_u32(np, "st-spics,peripcfg-reg",
    135				&spics->perip_cfg))
    136		goto err_dt_data;
    137	if (of_property_read_u32(np, "st-spics,sw-enable-bit",
    138				&spics->sw_enable_bit))
    139		goto err_dt_data;
    140	if (of_property_read_u32(np, "st-spics,cs-value-bit",
    141				&spics->cs_value_bit))
    142		goto err_dt_data;
    143	if (of_property_read_u32(np, "st-spics,cs-enable-mask",
    144				&spics->cs_enable_mask))
    145		goto err_dt_data;
    146	if (of_property_read_u32(np, "st-spics,cs-enable-shift",
    147				&spics->cs_enable_shift))
    148		goto err_dt_data;
    149
    150	spics->chip.ngpio = NUM_OF_GPIO;
    151	spics->chip.base = -1;
    152	spics->chip.request = spics_request;
    153	spics->chip.free = spics_free;
    154	spics->chip.direction_input = spics_direction_input;
    155	spics->chip.direction_output = spics_direction_output;
    156	spics->chip.get = spics_get_value;
    157	spics->chip.set = spics_set_value;
    158	spics->chip.label = dev_name(&pdev->dev);
    159	spics->chip.parent = &pdev->dev;
    160	spics->chip.owner = THIS_MODULE;
    161	spics->last_off = -1;
    162
    163	return devm_gpiochip_add_data(&pdev->dev, &spics->chip, spics);
    164
    165err_dt_data:
    166	dev_err(&pdev->dev, "DT probe failed\n");
    167	return -EINVAL;
    168}
    169
    170static const struct of_device_id spics_gpio_of_match[] = {
    171	{ .compatible = "st,spear-spics-gpio" },
    172	{}
    173};
    174
    175static struct platform_driver spics_gpio_driver = {
    176	.probe = spics_gpio_probe,
    177	.driver = {
    178		.name = "spear-spics-gpio",
    179		.of_match_table = spics_gpio_of_match,
    180	},
    181};
    182
    183static int __init spics_gpio_init(void)
    184{
    185	return platform_driver_register(&spics_gpio_driver);
    186}
    187subsys_initcall(spics_gpio_init);