cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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amdgpu_fdinfo.c (3547B)


      1// SPDX-License-Identifier: MIT
      2/* Copyright 2021 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: David Nieto
     23 *          Roy Sun
     24 */
     25
     26#include <linux/debugfs.h>
     27#include <linux/list.h>
     28#include <linux/module.h>
     29#include <linux/uaccess.h>
     30#include <linux/reboot.h>
     31#include <linux/syscalls.h>
     32
     33#include <drm/amdgpu_drm.h>
     34#include <drm/drm_debugfs.h>
     35#include <drm/drm_drv.h>
     36
     37#include "amdgpu.h"
     38#include "amdgpu_vm.h"
     39#include "amdgpu_gem.h"
     40#include "amdgpu_ctx.h"
     41#include "amdgpu_fdinfo.h"
     42
     43
     44static const char *amdgpu_ip_name[AMDGPU_HW_IP_NUM] = {
     45	[AMDGPU_HW_IP_GFX]	=	"gfx",
     46	[AMDGPU_HW_IP_COMPUTE]	=	"compute",
     47	[AMDGPU_HW_IP_DMA]	=	"dma",
     48	[AMDGPU_HW_IP_UVD]	=	"dec",
     49	[AMDGPU_HW_IP_VCE]	=	"enc",
     50	[AMDGPU_HW_IP_UVD_ENC]	=	"enc_1",
     51	[AMDGPU_HW_IP_VCN_DEC]	=	"dec",
     52	[AMDGPU_HW_IP_VCN_ENC]	=	"enc",
     53	[AMDGPU_HW_IP_VCN_JPEG]	=	"jpeg",
     54};
     55
     56void amdgpu_show_fdinfo(struct seq_file *m, struct file *f)
     57{
     58	struct drm_file *file = f->private_data;
     59	struct amdgpu_device *adev = drm_to_adev(file->minor->dev);
     60	struct amdgpu_fpriv *fpriv = file->driver_priv;
     61	struct amdgpu_vm *vm = &fpriv->vm;
     62
     63	uint64_t vram_mem = 0, gtt_mem = 0, cpu_mem = 0;
     64	ktime_t usage[AMDGPU_HW_IP_NUM];
     65	uint32_t bus, dev, fn, domain;
     66	unsigned int hw_ip;
     67	int ret;
     68
     69	bus = adev->pdev->bus->number;
     70	domain = pci_domain_nr(adev->pdev->bus);
     71	dev = PCI_SLOT(adev->pdev->devfn);
     72	fn = PCI_FUNC(adev->pdev->devfn);
     73
     74	ret = amdgpu_bo_reserve(vm->root.bo, false);
     75	if (ret)
     76		return;
     77
     78	amdgpu_vm_get_memory(vm, &vram_mem, &gtt_mem, &cpu_mem);
     79	amdgpu_bo_unreserve(vm->root.bo);
     80
     81	amdgpu_ctx_mgr_usage(&fpriv->ctx_mgr, usage);
     82
     83	/*
     84	 * ******************************************************************
     85	 * For text output format description please see drm-usage-stats.rst!
     86	 * ******************************************************************
     87	 */
     88
     89	seq_printf(m, "pasid:\t%u\n", fpriv->vm.pasid);
     90	seq_printf(m, "drm-driver:\t%s\n", file->minor->dev->driver->name);
     91	seq_printf(m, "drm-pdev:\t%04x:%02x:%02x.%d\n", domain, bus, dev, fn);
     92	seq_printf(m, "drm-client-id:\t%Lu\n", vm->immediate.fence_context);
     93	seq_printf(m, "drm-memory-vram:\t%llu KiB\n", vram_mem/1024UL);
     94	seq_printf(m, "drm-memory-gtt: \t%llu KiB\n", gtt_mem/1024UL);
     95	seq_printf(m, "drm-memory-cpu: \t%llu KiB\n", cpu_mem/1024UL);
     96	for (hw_ip = 0; hw_ip < AMDGPU_HW_IP_NUM; ++hw_ip) {
     97		if (!usage[hw_ip])
     98			continue;
     99
    100		seq_printf(m, "drm-engine-%s:\t%Ld ns\n", amdgpu_ip_name[hw_ip],
    101			   ktime_to_ns(usage[hw_ip]));
    102	}
    103}