cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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amdgpu_mca.h (2099B)


      1/*
      2 * Copyright (C) 2021  Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included
     12 * in all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
     18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     20 */
     21#ifndef __AMDGPU_MCA_H__
     22#define __AMDGPU_MCA_H__
     23
     24struct amdgpu_mca_ras_block {
     25	struct amdgpu_ras_block_object ras_block;
     26};
     27
     28struct amdgpu_mca_ras {
     29	struct ras_common_if *ras_if;
     30	struct amdgpu_mca_ras_block *ras;
     31};
     32
     33struct amdgpu_mca_funcs {
     34	void (*init)(struct amdgpu_device *adev);
     35};
     36
     37struct amdgpu_mca {
     38	const struct amdgpu_mca_funcs *funcs;
     39	struct amdgpu_mca_ras mp0;
     40	struct amdgpu_mca_ras mp1;
     41	struct amdgpu_mca_ras mpio;
     42};
     43
     44void amdgpu_mca_query_correctable_error_count(struct amdgpu_device *adev,
     45					      uint64_t mc_status_addr,
     46					      unsigned long *error_count);
     47
     48void amdgpu_mca_query_uncorrectable_error_count(struct amdgpu_device *adev,
     49						uint64_t mc_status_addr,
     50						unsigned long *error_count);
     51
     52void amdgpu_mca_reset_error_count(struct amdgpu_device *adev,
     53				  uint64_t mc_status_addr);
     54
     55void amdgpu_mca_query_ras_error_count(struct amdgpu_device *adev,
     56				      uint64_t mc_status_addr,
     57				      void *ras_error_status);
     58
     59#endif