cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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amdgpu_nbio.c (1669B)


      1/*
      2 * Copyright (C) 2019  Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included
     12 * in all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
     15 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN
     18 * AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
     19 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     20 */
     21
     22#include "amdgpu.h"
     23#include "amdgpu_ras.h"
     24
     25int amdgpu_nbio_ras_late_init(struct amdgpu_device *adev, struct ras_common_if *ras_block)
     26{
     27	int r;
     28	r = amdgpu_ras_block_late_init(adev, ras_block);
     29	if (r)
     30		return r;
     31
     32	if (amdgpu_ras_is_supported(adev, ras_block->block)) {
     33		r = amdgpu_irq_get(adev, &adev->nbio.ras_controller_irq, 0);
     34		if (r)
     35			goto late_fini;
     36		r = amdgpu_irq_get(adev, &adev->nbio.ras_err_event_athub_irq, 0);
     37		if (r)
     38			goto late_fini;
     39	}
     40
     41	return 0;
     42late_fini:
     43	amdgpu_ras_block_late_fini(adev, ras_block);
     44	return r;
     45}