cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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df_v3_6.h (1587B)


      1/*
      2 * Copyright 2018 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#ifndef __DF_V3_6_H__
     25#define __DF_V3_6_H__
     26
     27#include "soc15_common.h"
     28
     29enum DF_V3_6_MGCG {
     30	DF_V3_6_MGCG_DISABLE = 0,
     31	DF_V3_6_MGCG_ENABLE_00_CYCLE_DELAY = 1,
     32	DF_V3_6_MGCG_ENABLE_01_CYCLE_DELAY = 2,
     33	DF_V3_6_MGCG_ENABLE_15_CYCLE_DELAY = 13,
     34	DF_V3_6_MGCG_ENABLE_31_CYCLE_DELAY = 14,
     35	DF_V3_6_MGCG_ENABLE_63_CYCLE_DELAY = 15
     36};
     37
     38extern const struct attribute_group *df_v3_6_attr_groups[];
     39extern const struct amdgpu_df_funcs df_v3_6_funcs;
     40
     41#endif