cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

display_mode_lib.h (3007B)

      1/*
      2 * Copyright 2017 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25#ifndef __DISPLAY_MODE_LIB_H__
     26#define __DISPLAY_MODE_LIB_H__
     27
     28#include "dm_services.h"
     29#include "dc_features.h"
     30#include "display_mode_structs.h"
     31#include "display_mode_enums.h"
     32#include "display_mode_vba.h"
     33
     34enum dml_project {
     35	DML_PROJECT_UNDEFINED,
     36	DML_PROJECT_RAVEN1,
     37	DML_PROJECT_NAVI10,
     38	DML_PROJECT_NAVI10v2,
     39	DML_PROJECT_DCN201,
     40	DML_PROJECT_DCN21,
     41	DML_PROJECT_DCN30,
     42	DML_PROJECT_DCN31,
     43	DML_PROJECT_DCN31_FPGA,
     44};
     45
     46struct display_mode_lib;
     47
     48struct dml_funcs {
     49	void (*rq_dlg_get_dlg_reg)(
     50			struct display_mode_lib *mode_lib,
     51			display_dlg_regs_st *dlg_regs,
     52			display_ttu_regs_st *ttu_regs,
     53			const display_e2e_pipe_params_st *e2e_pipe_param,
     54			const unsigned int num_pipes,
     55			const unsigned int pipe_idx,
     56			const bool cstate_en,
     57			const bool pstate_en,
     58			const bool vm_en,
     59			const bool ignore_viewport_pos,
     60			const bool immediate_flip_support);
     61	void (*rq_dlg_get_rq_reg)(
     62		struct display_mode_lib *mode_lib,
     63		display_rq_regs_st *rq_regs,
     64		const display_pipe_params_st *pipe_param);
     65	void (*recalculate)(struct display_mode_lib *mode_lib);
     66	void (*validate)(struct display_mode_lib *mode_lib);
     67};
     68
     69struct display_mode_lib {
     70	struct _vcs_dpi_ip_params_st ip;
     71	struct _vcs_dpi_soc_bounding_box_st soc;
     72	enum dml_project project;
     73	struct vba_vars_st vba;
     74	struct dal_logger *logger;
     75	struct dml_funcs funcs;
     76	struct _vcs_dpi_display_e2e_pipe_params_st dml_pipe_state[6];
     77};
     78
     79void dml_init_instance(struct display_mode_lib *lib,
     80		const struct _vcs_dpi_soc_bounding_box_st *soc_bb,
     81		const struct _vcs_dpi_ip_params_st *ip_params,
     82		enum dml_project project);
     83
     84const char *dml_get_status_message(enum dm_validation_status status);
     85
     86void dml_log_pipe_params(
     87		struct display_mode_lib *mode_lib,
     88		display_e2e_pipe_params_st *pipes,
     89		int pipe_cnt);
     90
     91void dml_log_mode_support_params(struct display_mode_lib *mode_lib);
     92#endif