cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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rc_calc.c (2384B)

      1
      2/*
      3 * Copyright 2017 Advanced Micro Devices, Inc.
      4 *
      5 * Permission is hereby granted, free of charge, to any person obtaining a
      6 * copy of this software and associated documentation files (the "Software"),
      7 * to deal in the Software without restriction, including without limitation
      8 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      9 * and/or sell copies of the Software, and to permit persons to whom the
     10 * Software is furnished to do so, subject to the following conditions:
     11 *
     12 * The above copyright notice and this permission notice shall be included in
     13 * all copies or substantial portions of the Software.
     14 *
     15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     19 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     20 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     21 * OTHER DEALINGS IN THE SOFTWARE.
     22 *
     23 * Authors: AMD
     24 *
     25 */
     26#include "rc_calc.h"
     27
     28/**
     29 * calc_rc_params - reads the user's cmdline mode
     30 * @rc: DC internal DSC parameters
     31 * @pps: DRM struct with all required DSC values
     32 *
     33 * This function expects a drm_dsc_config data struct with all the required DSC
     34 * values previously filled out by our driver and based on this information it
     35 * computes some of the DSC values.
     36 *
     37 * @note This calculation requires float point operation, most of it executes
     38 * under kernel_fpu_{begin,end}.
     39 */
     40void calc_rc_params(struct rc_params *rc, const struct drm_dsc_config *pps)
     41{
     42	enum colour_mode mode;
     43	enum bits_per_comp bpc;
     44	bool is_navite_422_or_420;
     45	u16 drm_bpp = pps->bits_per_pixel;
     46	int slice_width  = pps->slice_width;
     47	int slice_height = pps->slice_height;
     48
     49	mode = pps->convert_rgb ? CM_RGB : (pps->simple_422  ? CM_444 :
     50					   (pps->native_422  ? CM_422 :
     51					    pps->native_420  ? CM_420 : CM_444));
     52	bpc = (pps->bits_per_component == 8) ? BPC_8 : (pps->bits_per_component == 10)
     53					     ? BPC_10 : BPC_12;
     54
     55	is_navite_422_or_420 = pps->native_422 || pps->native_420;
     56
     57	DC_FP_START();
     58	_do_calc_rc_params(rc, mode, bpc, drm_bpp, is_navite_422_or_420,
     59			   slice_width, slice_height,
     60			   pps->dsc_version_minor);
     61	DC_FP_END();
     62}