cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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hw_factory.c (3314B)


      1/*
      2 * Copyright 2012-15 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25
     26#include <linux/slab.h>
     27
     28#include "dm_services.h"
     29
     30/*
     31 * Pre-requisites: headers required by header of this unit
     32 */
     33#include "include/gpio_types.h"
     34
     35/*
     36 * Header of this unit
     37 */
     38
     39#include "hw_factory.h"
     40
     41/*
     42 * Post-requisites: headers required by this unit
     43 */
     44
     45#if defined(CONFIG_DRM_AMD_DC_SI)
     46#include "dce60/hw_factory_dce60.h"
     47#endif
     48#include "dce80/hw_factory_dce80.h"
     49#include "dce110/hw_factory_dce110.h"
     50#include "dce120/hw_factory_dce120.h"
     51#include "dcn10/hw_factory_dcn10.h"
     52#include "dcn20/hw_factory_dcn20.h"
     53#include "dcn21/hw_factory_dcn21.h"
     54#include "dcn30/hw_factory_dcn30.h"
     55#include "dcn315/hw_factory_dcn315.h"
     56
     57#include "diagnostics/hw_factory_diag.h"
     58
     59/*
     60 * This unit
     61 */
     62
     63bool dal_hw_factory_init(
     64	struct hw_factory *factory,
     65	enum dce_version dce_version,
     66	enum dce_environment dce_environment)
     67{
     68	if (IS_FPGA_MAXIMUS_DC(dce_environment)) {
     69		dal_hw_factory_diag_fpga_init(factory);
     70		return true;
     71	}
     72
     73	switch (dce_version) {
     74#if defined(CONFIG_DRM_AMD_DC_SI)
     75	case DCE_VERSION_6_0:
     76	case DCE_VERSION_6_1:
     77	case DCE_VERSION_6_4:
     78		dal_hw_factory_dce60_init(factory);
     79		return true;
     80#endif
     81	case DCE_VERSION_8_0:
     82	case DCE_VERSION_8_1:
     83	case DCE_VERSION_8_3:
     84		dal_hw_factory_dce80_init(factory);
     85		return true;
     86
     87	case DCE_VERSION_10_0:
     88		dal_hw_factory_dce110_init(factory);
     89		return true;
     90	case DCE_VERSION_11_0:
     91	case DCE_VERSION_11_2:
     92	case DCE_VERSION_11_22:
     93		dal_hw_factory_dce110_init(factory);
     94		return true;
     95	case DCE_VERSION_12_0:
     96	case DCE_VERSION_12_1:
     97		dal_hw_factory_dce120_init(factory);
     98		return true;
     99	case DCN_VERSION_1_0:
    100	case DCN_VERSION_1_01:
    101		dal_hw_factory_dcn10_init(factory);
    102		return true;
    103	case DCN_VERSION_2_0:
    104		dal_hw_factory_dcn20_init(factory);
    105		return true;
    106	case DCN_VERSION_2_01:
    107	case DCN_VERSION_2_1:
    108		dal_hw_factory_dcn21_init(factory);
    109		return true;
    110	case DCN_VERSION_3_0:
    111	case DCN_VERSION_3_01:
    112	case DCN_VERSION_3_02:
    113	case DCN_VERSION_3_03:
    114	case DCN_VERSION_3_1:
    115	case DCN_VERSION_3_16:
    116		dal_hw_factory_dcn30_init(factory);
    117		return true;
    118	case DCN_VERSION_3_15:
    119		dal_hw_factory_dcn315_init(factory);
    120		return true;
    121	default:
    122		ASSERT_CRITICAL(false);
    123		return false;
    124	}
    125}