cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dc_link_ddc.h (3945B)

      1/*
      2 * Copyright 2012-15 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25
     26#ifndef __DAL_DDC_SERVICE_H__
     27#define __DAL_DDC_SERVICE_H__
     28
     29#include "include/ddc_service_types.h"
     30#include "include/i2caux_interface.h"
     31
     32#define EDID_SEGMENT_SIZE 256
     33
     34/* Address range from 0x00 to 0x1F.*/
     35#define DP_ADAPTOR_TYPE2_SIZE 0x20
     36#define DP_ADAPTOR_TYPE2_REG_ID 0x10
     37#define DP_ADAPTOR_TYPE2_REG_MAX_TMDS_CLK 0x1D
     38/* Identifies adaptor as Dual-mode adaptor */
     39#define DP_ADAPTOR_TYPE2_ID 0xA0
     40/* MHz*/
     41#define DP_ADAPTOR_TYPE2_MAX_TMDS_CLK 600
     42/* MHz*/
     43#define DP_ADAPTOR_TYPE2_MIN_TMDS_CLK 25
     44/* kHZ*/
     45#define DP_ADAPTOR_DVI_MAX_TMDS_CLK 165000
     46/* kHZ*/
     47#define DP_ADAPTOR_HDMI_SAFE_MAX_TMDS_CLK 165000
     48
     49#define DDC_I2C_COMMAND_ENGINE I2C_COMMAND_ENGINE_SW
     50
     51struct ddc_service;
     52struct graphics_object_id;
     53enum ddc_result;
     54struct av_sync_data;
     55struct dp_receiver_id_info;
     56
     57struct i2c_payloads;
     58struct aux_payloads;
     59enum aux_return_code_type;
     60
     61void dal_ddc_i2c_payloads_add(
     62		struct i2c_payloads *payloads,
     63		uint32_t address,
     64		uint32_t len,
     65		uint8_t *data,
     66		bool write);
     67
     68struct ddc_service_init_data {
     69	struct graphics_object_id id;
     70	struct dc_context *ctx;
     71	struct dc_link *link;
     72	bool is_dpia_link;
     73};
     74
     75struct ddc_service *dal_ddc_service_create(
     76		struct ddc_service_init_data *ddc_init_data);
     77
     78void dal_ddc_service_destroy(struct ddc_service **ddc);
     79
     80enum ddc_service_type dal_ddc_service_get_type(struct ddc_service *ddc);
     81
     82void dal_ddc_service_set_transaction_type(
     83		struct ddc_service *ddc,
     84		enum ddc_transaction_type type);
     85
     86bool dal_ddc_service_is_in_aux_transaction_mode(struct ddc_service *ddc);
     87
     88void dal_ddc_service_i2c_query_dp_dual_mode_adaptor(
     89		struct ddc_service *ddc,
     90		struct display_sink_capability *sink_cap);
     91
     92bool dal_ddc_service_query_ddc_data(
     93		struct ddc_service *ddc,
     94		uint32_t address,
     95		uint8_t *write_buf,
     96		uint32_t write_size,
     97		uint8_t *read_buf,
     98		uint32_t read_size);
     99
    100bool dal_ddc_submit_aux_command(struct ddc_service *ddc,
    101		struct aux_payload *payload);
    102
    103int dc_link_aux_transfer_raw(struct ddc_service *ddc,
    104		struct aux_payload *payload,
    105		enum aux_return_code_type *operation_result);
    106
    107bool dc_link_aux_transfer_with_retries(struct ddc_service *ddc,
    108		struct aux_payload *payload);
    109
    110bool dc_link_aux_try_to_configure_timeout(struct ddc_service *ddc,
    111		uint32_t timeout);
    112
    113void dal_ddc_service_write_scdc_data(
    114		struct ddc_service *ddc_service,
    115		uint32_t pix_clk,
    116		bool lte_340_scramble);
    117
    118void dal_ddc_service_read_scdc_data(
    119		struct ddc_service *ddc_service);
    120
    121void ddc_service_set_dongle_type(struct ddc_service *ddc,
    122		enum display_dongle_type dongle_type);
    123
    124void dal_ddc_service_set_ddc_pin(
    125		struct ddc_service *ddc_service,
    126		struct ddc *ddc);
    127
    128struct ddc *dal_ddc_service_get_ddc_pin(struct ddc_service *ddc_service);
    129
    130uint32_t get_defer_delay(struct ddc_service *ddc);
    131
    132#endif /* __DAL_DDC_SERVICE_H__ */
    133