cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dpp.h (7423B)


      1/*
      2 * Copyright 2012-15 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25
     26
     27#ifndef __DAL_DPP_H__
     28#define __DAL_DPP_H__
     29
     30#include "transform.h"
     31
     32union defer_reg_writes {
     33	struct {
     34		bool disable_blnd_lut:1;
     35		bool disable_3dlut:1;
     36		bool disable_shaper:1;
     37		bool disable_gamcor:1;
     38		bool disable_dscl:1;
     39	} bits;
     40	uint32_t raw;
     41};
     42
     43struct dpp {
     44	const struct dpp_funcs *funcs;
     45	struct dc_context *ctx;
     46	/**
     47	 * @inst:
     48	 *
     49	 * inst stands for "instance," and it is an id number that references a
     50	 * specific DPP.
     51	 */
     52	int inst;
     53	struct dpp_caps *caps;
     54	struct pwl_params regamma_params;
     55	struct pwl_params degamma_params;
     56	struct dpp_cursor_attributes cur_attr;
     57	union defer_reg_writes deferred_reg_writes;
     58
     59	struct pwl_params shaper_params;
     60	bool cm_bypass_mode;
     61};
     62
     63struct dpp_input_csc_matrix {
     64	enum dc_color_space color_space;
     65	uint16_t regval[12];
     66};
     67
     68static const struct dpp_input_csc_matrix __maybe_unused dpp_input_csc_matrix[] = {
     69	{COLOR_SPACE_SRGB,
     70		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
     71	{COLOR_SPACE_SRGB_LIMITED,
     72		{0x2000, 0, 0, 0, 0, 0x2000, 0, 0, 0, 0, 0x2000, 0} },
     73	{COLOR_SPACE_YCBCR601,
     74		{0x2cdd, 0x2000, 0, 0xe991, 0xe926, 0x2000, 0xf4fd, 0x10ef,
     75						0, 0x2000, 0x38b4, 0xe3a6} },
     76	{COLOR_SPACE_YCBCR601_LIMITED,
     77		{0x3353, 0x2568, 0, 0xe400, 0xe5dc, 0x2568, 0xf367, 0x1108,
     78						0, 0x2568, 0x40de, 0xdd3a} },
     79	{COLOR_SPACE_YCBCR709,
     80		{0x3265, 0x2000, 0, 0xe6ce, 0xf105, 0x2000, 0xfa01, 0xa7d, 0,
     81						0x2000, 0x3b61, 0xe24f} },
     82
     83	{COLOR_SPACE_YCBCR709_LIMITED,
     84		{0x39a6, 0x2568, 0, 0xe0d6, 0xeedd, 0x2568, 0xf925, 0x9a8, 0,
     85						0x2568, 0x43ee, 0xdbb2} }
     86};
     87
     88struct dpp_grph_csc_adjustment {
     89	struct fixed31_32 temperature_matrix[CSC_TEMPERATURE_MATRIX_SIZE];
     90	enum graphics_gamut_adjust_type gamut_adjust_type;
     91};
     92
     93struct cnv_color_keyer_params {
     94	int color_keyer_en;
     95	int color_keyer_mode;
     96	int color_keyer_alpha_low;
     97	int color_keyer_alpha_high;
     98	int color_keyer_red_low;
     99	int color_keyer_red_high;
    100	int color_keyer_green_low;
    101	int color_keyer_green_high;
    102	int color_keyer_blue_low;
    103	int color_keyer_blue_high;
    104};
    105
    106/* new for dcn2: set the 8bit alpha values based on the 2 bit alpha
    107 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT0   default: 0b00000000
    108 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT1   default: 0b01010101
    109 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT2   default: 0b10101010
    110 *ALPHA_2BIT_LUT. ALPHA_2BIT_LUT3   default: 0b11111111
    111 */
    112struct cnv_alpha_2bit_lut {
    113	int lut0;
    114	int lut1;
    115	int lut2;
    116	int lut3;
    117};
    118
    119struct dcn_dpp_state {
    120	uint32_t is_enabled;
    121	uint32_t igam_lut_mode;
    122	uint32_t igam_input_format;
    123	uint32_t dgam_lut_mode;
    124	uint32_t rgam_lut_mode;
    125	uint32_t gamut_remap_mode;
    126	uint32_t gamut_remap_c11_c12;
    127	uint32_t gamut_remap_c13_c14;
    128	uint32_t gamut_remap_c21_c22;
    129	uint32_t gamut_remap_c23_c24;
    130	uint32_t gamut_remap_c31_c32;
    131	uint32_t gamut_remap_c33_c34;
    132};
    133
    134struct CM_bias_params {
    135	uint32_t cm_bias_cr_r;
    136	uint32_t cm_bias_y_g;
    137	uint32_t cm_bias_cb_b;
    138	uint32_t cm_bias_format;
    139};
    140
    141struct dpp_funcs {
    142	bool (*dpp_program_gamcor_lut)(
    143		struct dpp *dpp_base, const struct pwl_params *params);
    144
    145	void (*dpp_set_pre_degam)(struct dpp *dpp_base,
    146			enum dc_transfer_func_predefined tr);
    147
    148	void (*dpp_program_cm_dealpha)(struct dpp *dpp_base,
    149		uint32_t enable, uint32_t additive_blending);
    150
    151	void (*dpp_program_cm_bias)(
    152		struct dpp *dpp_base,
    153		struct CM_bias_params *bias_params);
    154
    155	void (*dpp_read_state)(struct dpp *dpp, struct dcn_dpp_state *s);
    156
    157	void (*dpp_reset)(struct dpp *dpp);
    158
    159	void (*dpp_set_scaler)(struct dpp *dpp,
    160			const struct scaler_data *scl_data);
    161
    162	void (*dpp_set_pixel_storage_depth)(
    163			struct dpp *dpp,
    164			enum lb_pixel_depth depth,
    165			const struct bit_depth_reduction_params *bit_depth_params);
    166
    167	bool (*dpp_get_optimal_number_of_taps)(
    168			struct dpp *dpp,
    169			struct scaler_data *scl_data,
    170			const struct scaling_taps *in_taps);
    171
    172	void (*dpp_set_gamut_remap)(
    173			struct dpp *dpp,
    174			const struct dpp_grph_csc_adjustment *adjust);
    175
    176	void (*dpp_set_csc_default)(
    177		struct dpp *dpp,
    178		enum dc_color_space colorspace);
    179
    180	void (*dpp_set_csc_adjustment)(
    181		struct dpp *dpp,
    182		const uint16_t *regval);
    183
    184	void (*dpp_power_on_regamma_lut)(
    185		struct dpp *dpp,
    186		bool power_on);
    187
    188	void (*dpp_program_regamma_lut)(
    189			struct dpp *dpp,
    190			const struct pwl_result_data *rgb,
    191			uint32_t num);
    192
    193	void (*dpp_configure_regamma_lut)(
    194			struct dpp *dpp,
    195			bool is_ram_a);
    196
    197	void (*dpp_program_regamma_lutb_settings)(
    198			struct dpp *dpp,
    199			const struct pwl_params *params);
    200
    201	void (*dpp_program_regamma_luta_settings)(
    202			struct dpp *dpp,
    203			const struct pwl_params *params);
    204
    205	void (*dpp_program_regamma_pwl)(
    206		struct dpp *dpp,
    207		const struct pwl_params *params,
    208		enum opp_regamma mode);
    209
    210	void (*dpp_program_bias_and_scale)(
    211			struct dpp *dpp,
    212			struct dc_bias_and_scale *params);
    213
    214	void (*dpp_set_degamma)(
    215			struct dpp *dpp_base,
    216			enum ipp_degamma_mode mode);
    217
    218	void (*dpp_program_input_lut)(
    219			struct dpp *dpp_base,
    220			const struct dc_gamma *gamma);
    221
    222	void (*dpp_program_degamma_pwl)(struct dpp *dpp_base,
    223									 const struct pwl_params *params);
    224
    225	void (*dpp_setup)(
    226			struct dpp *dpp_base,
    227			enum surface_pixel_format format,
    228			enum expansion_mode mode,
    229			struct dc_csc_transform input_csc_color_matrix,
    230			enum dc_color_space input_color_space,
    231			struct cnv_alpha_2bit_lut *alpha_2bit_lut);
    232
    233	void (*dpp_full_bypass)(struct dpp *dpp_base);
    234
    235	void (*set_cursor_attributes)(
    236			struct dpp *dpp_base,
    237			struct dc_cursor_attributes *cursor_attributes);
    238
    239	void (*set_cursor_position)(
    240			struct dpp *dpp_base,
    241			const struct dc_cursor_position *pos,
    242			const struct dc_cursor_mi_param *param,
    243			uint32_t width,
    244			uint32_t height
    245			);
    246
    247	void (*dpp_set_hdr_multiplier)(
    248			struct dpp *dpp_base,
    249			uint32_t multiplier);
    250
    251	void (*set_optional_cursor_attributes)(
    252			struct dpp *dpp_base,
    253			struct dpp_cursor_attributes *attr);
    254
    255	void (*dpp_dppclk_control)(
    256			struct dpp *dpp_base,
    257			bool dppclk_div,
    258			bool enable);
    259
    260	void (*dpp_deferred_update)(
    261			struct dpp *dpp);
    262	bool (*dpp_program_blnd_lut)(
    263			struct dpp *dpp,
    264			const struct pwl_params *params);
    265	bool (*dpp_program_shaper_lut)(
    266			struct dpp *dpp,
    267			const struct pwl_params *params);
    268	bool (*dpp_program_3dlut)(
    269			struct dpp *dpp,
    270			struct tetrahedral_params *params);
    271	void (*dpp_cnv_set_alpha_keyer)(
    272			struct dpp *dpp_base,
    273			struct cnv_color_keyer_params *color_keyer);
    274};
    275
    276
    277
    278#endif