link_hwss_dio.c (6393B)
1/* 2 * Copyright 2022 Advanced Micro Devices, Inc. 3 * 4 * Permission is hereby granted, free of charge, to any person obtaining a 5 * copy of this software and associated documentation files (the "Software"), 6 * to deal in the Software without restriction, including without limitation 7 * the rights to use, copy, modify, merge, publish, distribute, sublicense, 8 * and/or sell copies of the Software, and to permit persons to whom the 9 * Software is furnished to do so, subject to the following conditions: 10 * 11 * The above copyright notice and this permission notice shall be included in 12 * all copies or substantial portions of the Software. 13 * 14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR 15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, 16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL 17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR 18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, 19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR 20 * OTHER DEALINGS IN THE SOFTWARE. 21 * 22 * Authors: AMD 23 * 24 */ 25#include "link_hwss_dio.h" 26#include "core_types.h" 27#include "dc_link_dp.h" 28#include "link_enc_cfg.h" 29 30void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx, 31 struct fixed31_32 throttled_vcp_size) 32{ 33 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; 34 35 stream_encoder->funcs->set_throttled_vcp_size( 36 stream_encoder, 37 throttled_vcp_size); 38} 39 40void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx) 41{ 42 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); 43 44 link_enc->funcs->connect_dig_be_to_fe(link_enc, 45 pipe_ctx->stream_res.stream_enc->id, true); 46 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 47 dp_source_sequence_trace(pipe_ctx->stream->link, 48 DPCD_SOURCE_SEQ_AFTER_CONNECT_DIG_FE_BE); 49} 50 51void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx) 52{ 53 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(pipe_ctx->stream->link); 54 55 link_enc->funcs->connect_dig_be_to_fe( 56 link_enc, 57 pipe_ctx->stream_res.stream_enc->id, 58 false); 59 if (dc_is_dp_signal(pipe_ctx->stream->signal)) 60 dp_source_sequence_trace(pipe_ctx->stream->link, 61 DPCD_SOURCE_SEQ_AFTER_DISCONNECT_DIG_FE_BE); 62 63} 64 65void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx) 66{ 67 struct stream_encoder *stream_encoder = pipe_ctx->stream_res.stream_enc; 68 struct dc_stream_state *stream = pipe_ctx->stream; 69 struct dc_link *link = stream->link; 70 71 if (!dc_is_virtual_signal(stream->signal)) 72 stream_encoder->funcs->setup_stereo_sync( 73 stream_encoder, 74 pipe_ctx->stream_res.tg->inst, 75 stream->timing.timing_3d_format != TIMING_3D_FORMAT_NONE); 76 77 if (dc_is_dp_signal(stream->signal)) 78 stream_encoder->funcs->dp_set_stream_attribute( 79 stream_encoder, 80 &stream->timing, 81 stream->output_color_space, 82 stream->use_vsc_sdp_for_colorimetry, 83 link->dpcd_caps.dprx_feature.bits.SST_SPLIT_SDP_CAP); 84 else if (dc_is_hdmi_tmds_signal(stream->signal)) 85 stream_encoder->funcs->hdmi_set_stream_attribute( 86 stream_encoder, 87 &stream->timing, 88 stream->phy_pix_clk, 89 pipe_ctx->stream_res.audio != NULL); 90 else if (dc_is_dvi_signal(stream->signal)) 91 stream_encoder->funcs->dvi_set_stream_attribute( 92 stream_encoder, 93 &stream->timing, 94 (stream->signal == SIGNAL_TYPE_DVI_DUAL_LINK) ? 95 true : false); 96 else if (dc_is_lvds_signal(stream->signal)) 97 stream_encoder->funcs->lvds_set_stream_attribute( 98 stream_encoder, 99 &stream->timing); 100 101 if (dc_is_dp_signal(stream->signal)) 102 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DP_STREAM_ATTR); 103} 104 105void enable_dio_dp_link_output(struct dc_link *link, 106 const struct link_resource *link_res, 107 enum signal_type signal, 108 enum clock_source_id clock_source, 109 const struct dc_link_settings *link_settings) 110{ 111 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link); 112 113 if (dc_is_dp_sst_signal(signal)) 114 link_enc->funcs->enable_dp_output( 115 link_enc, 116 link_settings, 117 clock_source); 118 else 119 link_enc->funcs->enable_dp_mst_output( 120 link_enc, 121 link_settings, 122 clock_source); 123 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_ENABLE_LINK_PHY); 124} 125 126void disable_dio_dp_link_output(struct dc_link *link, 127 const struct link_resource *link_res, 128 enum signal_type signal) 129{ 130 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link); 131 132 link_enc->funcs->disable_output(link_enc, signal); 133 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_DISABLE_LINK_PHY); 134} 135 136void set_dio_dp_link_test_pattern(struct dc_link *link, 137 const struct link_resource *link_res, 138 struct encoder_set_dp_phy_pattern_param *tp_params) 139{ 140 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link); 141 142 link_enc->funcs->dp_set_phy_pattern(link_enc, tp_params); 143 dp_source_sequence_trace(link, DPCD_SOURCE_SEQ_AFTER_SET_SOURCE_PATTERN); 144} 145 146void set_dio_dp_lane_settings(struct dc_link *link, 147 const struct link_resource *link_res, 148 const struct dc_link_settings *link_settings, 149 const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]) 150{ 151 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link); 152 153 link_enc->funcs->dp_set_lane_settings(link_enc, link_settings, lane_settings); 154} 155 156static void update_dio_stream_allocation_table(struct dc_link *link, 157 const struct link_resource *link_res, 158 const struct link_mst_stream_allocation_table *table) 159{ 160 struct link_encoder *link_enc = link_enc_cfg_get_link_enc(link); 161 162 ASSERT(link_enc); 163 link_enc->funcs->update_mst_stream_allocation_table(link_enc, table); 164} 165 166static const struct link_hwss dio_link_hwss = { 167 .setup_stream_encoder = setup_dio_stream_encoder, 168 .reset_stream_encoder = reset_dio_stream_encoder, 169 .setup_stream_attribute = setup_dio_stream_attribute, 170 .ext = { 171 .set_throttled_vcp_size = set_dio_throttled_vcp_size, 172 .enable_dp_link_output = enable_dio_dp_link_output, 173 .disable_dp_link_output = disable_dio_dp_link_output, 174 .set_dp_link_test_pattern = set_dio_dp_link_test_pattern, 175 .set_dp_lane_settings = set_dio_dp_lane_settings, 176 .update_stream_allocation_table = update_dio_stream_allocation_table, 177 }, 178}; 179 180bool can_use_dio_link_hwss(const struct dc_link *link, 181 const struct link_resource *link_res) 182{ 183 return link->link_enc != NULL; 184} 185 186const struct link_hwss *get_dio_link_hwss(void) 187{ 188 return &dio_link_hwss; 189}