cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

link_hwss_dio.h (2378B)

      1/*
      2 * Copyright 2022 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25#ifndef __LINK_HWSS_DIO_H__
     26#define __LINK_HWSS_DIO_H__
     27
     28#include "link_hwss.h"
     29
     30const struct link_hwss *get_dio_link_hwss(void);
     31bool can_use_dio_link_hwss(const struct dc_link *link,
     32		const struct link_resource *link_res);
     33void set_dio_throttled_vcp_size(struct pipe_ctx *pipe_ctx,
     34		struct fixed31_32 throttled_vcp_size);
     35void setup_dio_stream_encoder(struct pipe_ctx *pipe_ctx);
     36void reset_dio_stream_encoder(struct pipe_ctx *pipe_ctx);
     37void setup_dio_stream_attribute(struct pipe_ctx *pipe_ctx);
     38void enable_dio_dp_link_output(struct dc_link *link,
     39		const struct link_resource *link_res,
     40		enum signal_type signal,
     41		enum clock_source_id clock_source,
     42		const struct dc_link_settings *link_settings);
     43void disable_dio_dp_link_output(struct dc_link *link,
     44		const struct link_resource *link_res,
     45		enum signal_type signal);
     46void set_dio_dp_link_test_pattern(struct dc_link *link,
     47		const struct link_resource *link_res,
     48		struct encoder_set_dp_phy_pattern_param *tp_params);
     49void set_dio_dp_lane_settings(struct dc_link *link,
     50		const struct link_resource *link_res,
     51		const struct dc_link_settings *link_settings,
     52		const struct dc_lane_settings lane_settings[LANE_COUNT_DP_MAX]);
     53
     54#endif /* __LINK_HWSS_DIO_H__ */