cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dmub_dcn301.c (1818B)

      1/*
      2 * Copyright 2020 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 * Authors: AMD
     23 *
     24 */
     25
     26#include "../dmub_srv.h"
     27#include "dmub_reg.h"
     28#include "dmub_dcn301.h"
     29
     30#include "dcn/dcn_3_0_1_offset.h"
     31#include "dcn/dcn_3_0_1_sh_mask.h"
     32#include "vangogh_ip_offset.h"
     33
     34#define BASE_INNER(seg) DCN_BASE__INST0_SEG##seg
     35#define CTX dmub
     36#define REGS dmub->regs
     37
     38/* Registers. */
     39
     40const struct dmub_srv_common_regs dmub_srv_dcn301_regs = {
     41#define DMUB_SR(reg) REG_OFFSET(reg),
     42	{
     43		DMUB_COMMON_REGS()
     44		DMCUB_INTERNAL_REGS()
     45	},
     46#undef DMUB_SR
     47
     48#define DMUB_SF(reg, field) FD_MASK(reg, field),
     49	{ DMUB_COMMON_FIELDS() },
     50#undef DMUB_SF
     51
     52#define DMUB_SF(reg, field) FD_SHIFT(reg, field),
     53	{ DMUB_COMMON_FIELDS() },
     54#undef DMUB_SF
     55};
     56
     57/* Shared functions. */
     58