cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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amdgpu_dpm_internal.c (3236B)


      1/*
      2 * Copyright 2021 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#include "amdgpu.h"
     25#include "amdgpu_display.h"
     26#include "hwmgr.h"
     27#include "amdgpu_smu.h"
     28#include "amdgpu_dpm_internal.h"
     29
     30void amdgpu_dpm_get_active_displays(struct amdgpu_device *adev)
     31{
     32	struct drm_device *ddev = adev_to_drm(adev);
     33	struct drm_crtc *crtc;
     34	struct amdgpu_crtc *amdgpu_crtc;
     35
     36	adev->pm.dpm.new_active_crtcs = 0;
     37	adev->pm.dpm.new_active_crtc_count = 0;
     38	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
     39		list_for_each_entry(crtc,
     40				    &ddev->mode_config.crtc_list, head) {
     41			amdgpu_crtc = to_amdgpu_crtc(crtc);
     42			if (amdgpu_crtc->enabled) {
     43				adev->pm.dpm.new_active_crtcs |= (1 << amdgpu_crtc->crtc_id);
     44				adev->pm.dpm.new_active_crtc_count++;
     45			}
     46		}
     47	}
     48}
     49
     50u32 amdgpu_dpm_get_vblank_time(struct amdgpu_device *adev)
     51{
     52	struct drm_device *dev = adev_to_drm(adev);
     53	struct drm_crtc *crtc;
     54	struct amdgpu_crtc *amdgpu_crtc;
     55	u32 vblank_in_pixels;
     56	u32 vblank_time_us = 0xffffffff; /* if the displays are off, vblank time is max */
     57
     58	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
     59		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
     60			amdgpu_crtc = to_amdgpu_crtc(crtc);
     61			if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) {
     62				vblank_in_pixels =
     63					amdgpu_crtc->hw_mode.crtc_htotal *
     64					(amdgpu_crtc->hw_mode.crtc_vblank_end -
     65					amdgpu_crtc->hw_mode.crtc_vdisplay +
     66					(amdgpu_crtc->v_border * 2));
     67
     68				vblank_time_us = vblank_in_pixels * 1000 / amdgpu_crtc->hw_mode.clock;
     69				break;
     70			}
     71		}
     72	}
     73
     74	return vblank_time_us;
     75}
     76
     77u32 amdgpu_dpm_get_vrefresh(struct amdgpu_device *adev)
     78{
     79	struct drm_device *dev = adev_to_drm(adev);
     80	struct drm_crtc *crtc;
     81	struct amdgpu_crtc *amdgpu_crtc;
     82	u32 vrefresh = 0;
     83
     84	if (adev->mode_info.num_crtc && adev->mode_info.mode_config_initialized) {
     85		list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
     86			amdgpu_crtc = to_amdgpu_crtc(crtc);
     87			if (crtc->enabled && amdgpu_crtc->enabled && amdgpu_crtc->hw_mode.clock) {
     88				vrefresh = drm_mode_vrefresh(&amdgpu_crtc->hw_mode);
     89				break;
     90			}
     91		}
     92	}
     93
     94	return vrefresh;
     95}