cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

smu10_inc.h (1632B)

      1/*
      2 * Copyright 2016 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#ifndef SMU10_INC_H
     25#define SMU10_INC_H
     26
     27
     28#include "asic_reg/mp/mp_10_0_default.h"
     29#include "asic_reg/mp/mp_10_0_offset.h"
     30#include "asic_reg/mp/mp_10_0_sh_mask.h"
     31
     32#include "asic_reg/nbio/nbio_7_0_default.h"
     33#include "asic_reg/nbio/nbio_7_0_offset.h"
     34#include "asic_reg/nbio/nbio_7_0_sh_mask.h"
     35
     36#include "asic_reg/thm/thm_10_0_default.h"
     37#include "asic_reg/thm/thm_10_0_offset.h"
     38#include "asic_reg/thm/thm_10_0_sh_mask.h"
     39
     40
     41#define ixDDI_PHY_GEN_STATUS                       0x3FCE8
     42
     43#endif