cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

smu10.h (8083B)


      1/*
      2 * Copyright 2017 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#ifndef SMU10_H
     25#define SMU10_H
     26
     27#pragma pack(push, 1)
     28
     29#define ENABLE_DEBUG_FEATURES
     30
     31/* Feature Control Defines */
     32#define FEATURE_CCLK_CONTROLLER_BIT   0
     33#define FEATURE_FAN_CONTROLLER_BIT    1
     34#define FEATURE_DATA_CALCULATION_BIT  2
     35#define FEATURE_PPT_BIT               3
     36#define FEATURE_TDC_BIT               4
     37#define FEATURE_THERMAL_BIT           5
     38#define FEATURE_FIT_BIT               6
     39#define FEATURE_EDC_BIT               7
     40#define FEATURE_PLL_POWER_DOWN_BIT    8
     41#define FEATURE_ULV_BIT               9
     42#define FEATURE_VDDOFF_BIT            10
     43#define FEATURE_VCN_DPM_BIT           11
     44#define FEATURE_ACP_DPM_BIT           12
     45#define FEATURE_ISP_DPM_BIT           13
     46#define FEATURE_FCLK_DPM_BIT          14
     47#define FEATURE_SOCCLK_DPM_BIT        15
     48#define FEATURE_MP0CLK_DPM_BIT        16
     49#define FEATURE_LCLK_DPM_BIT          17
     50#define FEATURE_SHUBCLK_DPM_BIT       18
     51#define FEATURE_DCEFCLK_DPM_BIT       19
     52#define FEATURE_GFX_DPM_BIT           20
     53#define FEATURE_DS_GFXCLK_BIT         21
     54#define FEATURE_DS_SOCCLK_BIT         22
     55#define FEATURE_DS_LCLK_BIT           23
     56#define FEATURE_DS_DCEFCLK_BIT        24
     57#define FEATURE_DS_SHUBCLK_BIT        25
     58#define FEATURE_RM_BIT                26
     59#define FEATURE_S0i2_BIT              27
     60#define FEATURE_WHISPER_MODE_BIT      28
     61#define FEATURE_DS_FCLK_BIT           29
     62#define FEATURE_DS_SMNCLK_BIT         30
     63#define FEATURE_DS_MP1CLK_BIT         31
     64#define FEATURE_DS_MP0CLK_BIT         32
     65#define FEATURE_MGCG_BIT              33
     66#define FEATURE_DS_FUSE_SRAM_BIT      34
     67#define FEATURE_GFX_CKS               35
     68#define FEATURE_PSI0_BIT              36
     69#define FEATURE_PROCHOT_BIT           37
     70#define FEATURE_CPUOFF_BIT            38
     71#define FEATURE_STAPM_BIT             39
     72#define FEATURE_CORE_CSTATES_BIT      40
     73#define FEATURE_SPARE_41_BIT          41
     74#define FEATURE_SPARE_42_BIT          42
     75#define FEATURE_SPARE_43_BIT          43
     76#define FEATURE_SPARE_44_BIT          44
     77#define FEATURE_SPARE_45_BIT          45
     78#define FEATURE_SPARE_46_BIT          46
     79#define FEATURE_SPARE_47_BIT          47
     80#define FEATURE_SPARE_48_BIT          48
     81#define FEATURE_SPARE_49_BIT          49
     82#define FEATURE_SPARE_50_BIT          50
     83#define FEATURE_SPARE_51_BIT          51
     84#define FEATURE_SPARE_52_BIT          52
     85#define FEATURE_SPARE_53_BIT          53
     86#define FEATURE_SPARE_54_BIT          54
     87#define FEATURE_SPARE_55_BIT          55
     88#define FEATURE_SPARE_56_BIT          56
     89#define FEATURE_SPARE_57_BIT          57
     90#define FEATURE_SPARE_58_BIT          58
     91#define FEATURE_SPARE_59_BIT          59
     92#define FEATURE_SPARE_60_BIT          60
     93#define FEATURE_SPARE_61_BIT          61
     94#define FEATURE_SPARE_62_BIT          62
     95#define FEATURE_SPARE_63_BIT          63
     96
     97#define NUM_FEATURES                  64
     98
     99#define FEATURE_CCLK_CONTROLLER_MASK  (1 << FEATURE_CCLK_CONTROLLER_BIT)
    100#define FEATURE_FAN_CONTROLLER_MASK   (1 << FEATURE_FAN_CONTROLLER_BIT)
    101#define FEATURE_DATA_CALCULATION_MASK (1 << FEATURE_DATA_CALCULATION_BIT)
    102#define FEATURE_PPT_MASK              (1 << FEATURE_PPT_BIT)
    103#define FEATURE_TDC_MASK              (1 << FEATURE_TDC_BIT)
    104#define FEATURE_THERMAL_MASK          (1 << FEATURE_THERMAL_BIT)
    105#define FEATURE_FIT_MASK              (1 << FEATURE_FIT_BIT)
    106#define FEATURE_EDC_MASK              (1 << FEATURE_EDC_BIT)
    107#define FEATURE_PLL_POWER_DOWN_MASK   (1 << FEATURE_PLL_POWER_DOWN_BIT)
    108#define FEATURE_ULV_MASK              (1 << FEATURE_ULV_BIT)
    109#define FEATURE_VDDOFF_MASK           (1 << FEATURE_VDDOFF_BIT)
    110#define FEATURE_VCN_DPM_MASK          (1 << FEATURE_VCN_DPM_BIT)
    111#define FEATURE_ACP_DPM_MASK          (1 << FEATURE_ACP_DPM_BIT)
    112#define FEATURE_ISP_DPM_MASK          (1 << FEATURE_ISP_DPM_BIT)
    113#define FEATURE_FCLK_DPM_MASK         (1 << FEATURE_FCLK_DPM_BIT)
    114#define FEATURE_SOCCLK_DPM_MASK       (1 << FEATURE_SOCCLK_DPM_BIT)
    115#define FEATURE_MP0CLK_DPM_MASK       (1 << FEATURE_MP0CLK_DPM_BIT)
    116#define FEATURE_LCLK_DPM_MASK         (1 << FEATURE_LCLK_DPM_BIT)
    117#define FEATURE_SHUBCLK_DPM_MASK      (1 << FEATURE_SHUBCLK_DPM_BIT)
    118#define FEATURE_DCEFCLK_DPM_MASK      (1 << FEATURE_DCEFCLK_DPM_BIT)
    119#define FEATURE_GFX_DPM_MASK          (1 << FEATURE_GFX_DPM_BIT)
    120#define FEATURE_DS_GFXCLK_MASK        (1 << FEATURE_DS_GFXCLK_BIT)
    121#define FEATURE_DS_SOCCLK_MASK        (1 << FEATURE_DS_SOCCLK_BIT)
    122#define FEATURE_DS_LCLK_MASK          (1 << FEATURE_DS_LCLK_BIT)
    123#define FEATURE_DS_DCEFCLK_MASK       (1 << FEATURE_DS_DCEFCLK_BIT)
    124#define FEATURE_DS_SHUBCLK_MASK       (1 << FEATURE_DS_SHUBCLK_BIT)
    125#define FEATURE_RM_MASK               (1 << FEATURE_RM_BIT)
    126#define FEATURE_DS_FCLK_MASK          (1 << FEATURE_DS_FCLK_BIT)
    127#define FEATURE_DS_SMNCLK_MASK        (1 << FEATURE_DS_SMNCLK_BIT)
    128#define FEATURE_DS_MP1CLK_MASK        (1 << FEATURE_DS_MP1CLK_BIT)
    129#define FEATURE_DS_MP0CLK_MASK        (1 << FEATURE_DS_MP0CLK_BIT)
    130#define FEATURE_MGCG_MASK             (1 << FEATURE_MGCG_BIT)
    131#define FEATURE_DS_FUSE_SRAM_MASK     (1 << FEATURE_DS_FUSE_SRAM_BIT)
    132#define FEATURE_PSI0_MASK             (1 << FEATURE_PSI0_BIT)
    133#define FEATURE_STAPM_MASK            (1 << FEATURE_STAPM_BIT)
    134#define FEATURE_PROCHOT_MASK          (1 << FEATURE_PROCHOT_BIT)
    135#define FEATURE_CPUOFF_MASK           (1 << FEATURE_CPUOFF_BIT)
    136#define FEATURE_CORE_CSTATES_MASK     (1 << FEATURE_CORE_CSTATES_BIT)
    137
    138/* Workload bits */
    139#define WORKLOAD_PPLIB_FULL_SCREEN_3D_BIT 0
    140#define WORKLOAD_PPLIB_VIDEO_BIT          2
    141#define WORKLOAD_PPLIB_VR_BIT             3
    142#define WORKLOAD_PPLIB_COMPUTE_BIT        4
    143#define WORKLOAD_PPLIB_CUSTOM_BIT         5
    144#define WORKLOAD_PPLIB_COUNT              6
    145
    146typedef struct {
    147	/* MP1_EXT_SCRATCH0 */
    148	uint32_t CurrLevel_ACP     : 4;
    149	uint32_t CurrLevel_ISP     : 4;
    150	uint32_t CurrLevel_VCN     : 4;
    151	uint32_t CurrLevel_LCLK    : 4;
    152	uint32_t CurrLevel_MP0CLK  : 4;
    153	uint32_t CurrLevel_FCLK    : 4;
    154	uint32_t CurrLevel_SOCCLK  : 4;
    155	uint32_t CurrLevel_DCEFCLK : 4;
    156	/* MP1_EXT_SCRATCH1 */
    157	uint32_t TargLevel_ACP     : 4;
    158	uint32_t TargLevel_ISP     : 4;
    159	uint32_t TargLevel_VCN     : 4;
    160	uint32_t TargLevel_LCLK    : 4;
    161	uint32_t TargLevel_MP0CLK  : 4;
    162	uint32_t TargLevel_FCLK    : 4;
    163	uint32_t TargLevel_SOCCLK  : 4;
    164	uint32_t TargLevel_DCEFCLK : 4;
    165	/* MP1_EXT_SCRATCH2 */
    166	uint32_t CurrLevel_SHUBCLK  : 4;
    167	uint32_t TargLevel_SHUBCLK  : 4;
    168	uint32_t InUlv              : 1;
    169	uint32_t InS0i2             : 1;
    170	uint32_t InWhisperMode      : 1;
    171	uint32_t Reserved           : 21;
    172	/* MP1_EXT_SCRATCH3-4 */
    173	uint32_t Reserved2[2];
    174	/* MP1_EXT_SCRATCH5 */
    175	uint32_t FeatureStatus[NUM_FEATURES / 32];
    176} FwStatus_t;
    177
    178#define TABLE_BIOS_IF            0 /* Called by BIOS */
    179#define TABLE_WATERMARKS         1 /* Called by Driver */
    180#define TABLE_CUSTOM_DPM         2 /* Called by Driver */
    181#define TABLE_PMSTATUSLOG        3 /* Called by Tools for Agm logging */
    182#define TABLE_DPMCLOCKS          4 /* Called by Driver */
    183#define TABLE_MOMENTARY_PM       5 /* Called by Tools */
    184#define TABLE_COUNT              6
    185
    186#pragma pack(pop)
    187
    188#endif