cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

smu7_smumgr.h (3336B)

      1/*
      2 * Copyright 2015 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23
     24#ifndef _SMU7_SMUMANAGER_H
     25#define _SMU7_SMUMANAGER_H
     26
     27
     28#include <pp_endian.h>
     29
     30#define SMC_RAM_END 0x40000
     31
     32struct smu7_buffer_entry {
     33	uint32_t data_size;
     34	uint64_t mc_addr;
     35	void *kaddr;
     36	struct amdgpu_bo *handle;
     37};
     38
     39struct smu7_smumgr {
     40	struct smu7_buffer_entry smu_buffer;
     41	struct smu7_buffer_entry header_buffer;
     42	struct SMU_DRAMData_TOC *toc;
     43
     44	uint32_t                             soft_regs_start;
     45	uint32_t                             dpm_table_start;
     46	uint32_t                             mc_reg_table_start;
     47	uint32_t                             fan_table_start;
     48	uint32_t                             arb_table_start;
     49	uint32_t                             ulv_setting_starts;
     50	uint8_t                              security_hard_key;
     51	uint32_t                             acpi_optimization;
     52	uint32_t                             avfs_btc_param;
     53};
     54
     55
     56int smu7_copy_bytes_from_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
     57				uint32_t *dest, uint32_t byte_count, uint32_t limit);
     58int smu7_copy_bytes_to_smc(struct pp_hwmgr *hwmgr, uint32_t smc_start_address,
     59			const uint8_t *src, uint32_t byte_count, uint32_t limit);
     60int smu7_program_jump_on_start(struct pp_hwmgr *hwmgr);
     61bool smu7_is_smc_ram_running(struct pp_hwmgr *hwmgr);
     62int smu7_send_msg_to_smc(struct pp_hwmgr *hwmgr, uint16_t msg);
     63int smu7_send_msg_to_smc_with_parameter(struct pp_hwmgr *hwmgr, uint16_t msg,
     64						uint32_t parameter);
     65uint32_t smu7_get_argument(struct pp_hwmgr *hwmgr);
     66int smu7_send_msg_to_smc_offset(struct pp_hwmgr *hwmgr);
     67
     68enum cgs_ucode_id smu7_convert_fw_type_to_cgs(uint32_t fw_type);
     69int smu7_read_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr,
     70						uint32_t *value, uint32_t limit);
     71int smu7_write_smc_sram_dword(struct pp_hwmgr *hwmgr, uint32_t smc_addr,
     72						uint32_t value, uint32_t limit);
     73
     74int smu7_request_smu_load_fw(struct pp_hwmgr *hwmgr);
     75int smu7_check_fw_load_finish(struct pp_hwmgr *hwmgr, uint32_t fw_type);
     76int smu7_reload_firmware(struct pp_hwmgr *hwmgr);
     77int smu7_upload_smu_firmware_image(struct pp_hwmgr *hwmgr);
     78int smu7_init(struct pp_hwmgr *hwmgr);
     79int smu7_smu_fini(struct pp_hwmgr *hwmgr);
     80
     81int smu7_setup_pwr_virus(struct pp_hwmgr *hwmgr);
     82
     83#endif