cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

vega20_smumgr.h (2234B)

      1/*
      2 * Copyright 2018 Advanced Micro Devices, Inc.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice shall be included in
     12 * all copies or substantial portions of the Software.
     13 *
     14 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     15 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     16 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     17 * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
     18 * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
     19 * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
     20 * OTHER DEALINGS IN THE SOFTWARE.
     21 *
     22 */
     23#ifndef _VEGA20_SMUMANAGER_H_
     24#define _VEGA20_SMUMANAGER_H_
     25
     26#include "hwmgr.h"
     27#include "smu11_driver_if.h"
     28
     29struct smu_table_entry {
     30	uint32_t version;
     31	uint32_t size;
     32	uint64_t mc_addr;
     33	void *table;
     34	struct amdgpu_bo *handle;
     35};
     36
     37struct smu_table_array {
     38	struct smu_table_entry entry[TABLE_COUNT];
     39};
     40
     41struct vega20_smumgr {
     42	struct smu_table_array            smu_tables;
     43};
     44
     45#define SMU_FEATURES_LOW_MASK        0x00000000FFFFFFFF
     46#define SMU_FEATURES_LOW_SHIFT       0
     47#define SMU_FEATURES_HIGH_MASK       0xFFFFFFFF00000000
     48#define SMU_FEATURES_HIGH_SHIFT      32
     49
     50int vega20_enable_smc_features(struct pp_hwmgr *hwmgr,
     51		bool enable, uint64_t feature_mask);
     52int vega20_get_enabled_smc_features(struct pp_hwmgr *hwmgr,
     53		uint64_t *features_enabled);
     54int vega20_set_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
     55		uint8_t *table, uint16_t workload_type);
     56int vega20_get_activity_monitor_coeff(struct pp_hwmgr *hwmgr,
     57		uint8_t *table, uint16_t workload_type);
     58int vega20_set_pptable_driver_address(struct pp_hwmgr *hwmgr);
     59
     60bool vega20_is_smc_ram_running(struct pp_hwmgr *hwmgr);
     61
     62#endif
     63