cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel_ddi.h (3114B)


      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2019 Intel Corporation
      4 */
      5
      6#ifndef __INTEL_DDI_H__
      7#define __INTEL_DDI_H__
      8
      9#include "i915_reg_defs.h"
     10
     11struct drm_connector_state;
     12struct drm_i915_private;
     13struct intel_atomic_state;
     14struct intel_connector;
     15struct intel_crtc;
     16struct intel_crtc_state;
     17struct intel_dp;
     18struct intel_dpll_hw_state;
     19struct intel_encoder;
     20struct intel_shared_dpll;
     21enum pipe;
     22enum port;
     23enum transcoder;
     24
     25i915_reg_t dp_tp_ctl_reg(struct intel_encoder *encoder,
     26			 const struct intel_crtc_state *crtc_state);
     27i915_reg_t dp_tp_status_reg(struct intel_encoder *encoder,
     28			    const struct intel_crtc_state *crtc_state);
     29void intel_ddi_fdi_post_disable(struct intel_atomic_state *state,
     30				struct intel_encoder *intel_encoder,
     31				const struct intel_crtc_state *old_crtc_state,
     32				const struct drm_connector_state *old_conn_state);
     33void intel_ddi_enable_clock(struct intel_encoder *encoder,
     34			    const struct intel_crtc_state *crtc_state);
     35void intel_ddi_disable_clock(struct intel_encoder *encoder);
     36void intel_ddi_get_clock(struct intel_encoder *encoder,
     37			 struct intel_crtc_state *crtc_state,
     38			 struct intel_shared_dpll *pll);
     39void hsw_ddi_enable_clock(struct intel_encoder *encoder,
     40			  const struct intel_crtc_state *crtc_state);
     41void hsw_ddi_disable_clock(struct intel_encoder *encoder);
     42bool hsw_ddi_is_clock_enabled(struct intel_encoder *encoder);
     43void hsw_ddi_get_config(struct intel_encoder *encoder,
     44			struct intel_crtc_state *crtc_state);
     45struct intel_shared_dpll *icl_ddi_combo_get_pll(struct intel_encoder *encoder);
     46void hsw_prepare_dp_ddi_buffers(struct intel_encoder *encoder,
     47				const struct intel_crtc_state *crtc_state);
     48void intel_wait_ddi_buf_idle(struct drm_i915_private *dev_priv,
     49			     enum port port);
     50void intel_ddi_init(struct drm_i915_private *dev_priv, enum port port);
     51bool intel_ddi_get_hw_state(struct intel_encoder *encoder, enum pipe *pipe);
     52void intel_ddi_enable_transcoder_func(struct intel_encoder *encoder,
     53				      const struct intel_crtc_state *crtc_state);
     54void intel_ddi_disable_transcoder_func(const struct intel_crtc_state *crtc_state);
     55void intel_ddi_enable_pipe_clock(struct intel_encoder *encoder,
     56				 const struct intel_crtc_state *crtc_state);
     57void intel_ddi_disable_pipe_clock(const  struct intel_crtc_state *crtc_state);
     58void intel_ddi_set_dp_msa(const struct intel_crtc_state *crtc_state,
     59			  const struct drm_connector_state *conn_state);
     60bool intel_ddi_connector_get_hw_state(struct intel_connector *intel_connector);
     61void intel_ddi_set_vc_payload_alloc(const struct intel_crtc_state *crtc_state,
     62				    bool state);
     63void intel_ddi_compute_min_voltage_level(struct drm_i915_private *dev_priv,
     64					 struct intel_crtc_state *crtc_state);
     65int intel_ddi_toggle_hdcp_bits(struct intel_encoder *intel_encoder,
     66			       enum transcoder cpu_transcoder,
     67			       bool enable, u32 hdcp_mask);
     68void intel_ddi_sanitize_encoder_pll_mapping(struct intel_encoder *encoder);
     69int intel_ddi_level(struct intel_encoder *encoder,
     70		    const struct intel_crtc_state *crtc_state,
     71		    int lane);
     72
     73#endif /* __INTEL_DDI_H__ */