cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i915_gem_ttm.h (2662B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2021 Intel Corporation
      4 */
      5#ifndef _I915_GEM_TTM_H_
      6#define _I915_GEM_TTM_H_
      7
      8#include <drm/ttm/ttm_placement.h>
      9
     10#include "gem/i915_gem_object_types.h"
     11
     12/**
     13 * i915_gem_to_ttm - Convert a struct drm_i915_gem_object to a
     14 * struct ttm_buffer_object.
     15 * @obj: Pointer to the gem object.
     16 *
     17 * Return: Pointer to the embedded struct ttm_buffer_object.
     18 */
     19static inline struct ttm_buffer_object *
     20i915_gem_to_ttm(struct drm_i915_gem_object *obj)
     21{
     22	return &obj->__do_not_access;
     23}
     24
     25/*
     26 * i915 ttm gem object destructor. Internal use only.
     27 */
     28void i915_ttm_bo_destroy(struct ttm_buffer_object *bo);
     29
     30/**
     31 * i915_ttm_to_gem - Convert a struct ttm_buffer_object to an embedding
     32 * struct drm_i915_gem_object.
     33 *
     34 * Return: Pointer to the embedding struct ttm_buffer_object, or NULL
     35 * if the object was not an i915 ttm object.
     36 */
     37static inline struct drm_i915_gem_object *
     38i915_ttm_to_gem(struct ttm_buffer_object *bo)
     39{
     40	if (bo->destroy != i915_ttm_bo_destroy)
     41		return NULL;
     42
     43	return container_of(bo, struct drm_i915_gem_object, __do_not_access);
     44}
     45
     46int __i915_gem_ttm_object_init(struct intel_memory_region *mem,
     47			       struct drm_i915_gem_object *obj,
     48			       resource_size_t offset,
     49			       resource_size_t size,
     50			       resource_size_t page_size,
     51			       unsigned int flags);
     52
     53/* Internal I915 TTM declarations and definitions below. */
     54
     55#define I915_PL_LMEM0 TTM_PL_PRIV
     56#define I915_PL_SYSTEM TTM_PL_SYSTEM
     57#define I915_PL_STOLEN TTM_PL_VRAM
     58#define I915_PL_GGTT TTM_PL_TT
     59
     60struct ttm_placement *i915_ttm_sys_placement(void);
     61
     62void i915_ttm_free_cached_io_rsgt(struct drm_i915_gem_object *obj);
     63
     64struct i915_refct_sgt *
     65i915_ttm_resource_get_st(struct drm_i915_gem_object *obj,
     66			 struct ttm_resource *res);
     67
     68void i915_ttm_adjust_lru(struct drm_i915_gem_object *obj);
     69
     70int i915_ttm_purge(struct drm_i915_gem_object *obj);
     71
     72/**
     73 * i915_ttm_gtt_binds_lmem - Should the memory be viewed as LMEM by the GTT?
     74 * @mem: struct ttm_resource representing the memory.
     75 *
     76 * Return: true if memory should be viewed as LMEM for GTT binding purposes,
     77 * false otherwise.
     78 */
     79static inline bool i915_ttm_gtt_binds_lmem(struct ttm_resource *mem)
     80{
     81	return mem->mem_type != I915_PL_SYSTEM;
     82}
     83
     84/**
     85 * i915_ttm_cpu_maps_iomem - Should the memory be viewed as IOMEM by the CPU?
     86 * @mem: struct ttm_resource representing the memory.
     87 *
     88 * Return: true if memory should be viewed as IOMEM for CPU mapping purposes.
     89 */
     90static inline bool i915_ttm_cpu_maps_iomem(struct ttm_resource *mem)
     91{
     92	/* Once / if we support GGTT, this is also false for cached ttm_tts */
     93	return mem->mem_type != I915_PL_SYSTEM;
     94}
     95#endif