cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel_gt_debugfs.c (2734B)

      1// SPDX-License-Identifier: MIT
      2/*
      3 * Copyright © 2019 Intel Corporation
      4 */
      5
      6#include <linux/debugfs.h>
      7
      8#include "i915_drv.h"
      9#include "intel_gt.h"
     10#include "intel_gt_debugfs.h"
     11#include "intel_gt_engines_debugfs.h"
     12#include "intel_gt_pm_debugfs.h"
     13#include "intel_sseu_debugfs.h"
     14#include "pxp/intel_pxp_debugfs.h"
     15#include "uc/intel_uc_debugfs.h"
     16
     17int intel_gt_debugfs_reset_show(struct intel_gt *gt, u64 *val)
     18{
     19	int ret = intel_gt_terminally_wedged(gt);
     20
     21	switch (ret) {
     22	case -EIO:
     23		*val = 1;
     24		return 0;
     25	case 0:
     26		*val = 0;
     27		return 0;
     28	default:
     29		return ret;
     30	}
     31}
     32
     33void intel_gt_debugfs_reset_store(struct intel_gt *gt, u64 val)
     34{
     35	/* Flush any previous reset before applying for a new one */
     36	wait_event(gt->reset.queue,
     37		   !test_bit(I915_RESET_BACKOFF, &gt->reset.flags));
     38
     39	intel_gt_handle_error(gt, val, I915_ERROR_CAPTURE,
     40			      "Manually reset engine mask to %llx", val);
     41}
     42
     43/*
     44 * keep the interface clean where the first parameter
     45 * is a 'struct intel_gt *' instead of 'void *'
     46 */
     47static int __intel_gt_debugfs_reset_show(void *data, u64 *val)
     48{
     49	return intel_gt_debugfs_reset_show(data, val);
     50}
     51
     52static int __intel_gt_debugfs_reset_store(void *data, u64 val)
     53{
     54	intel_gt_debugfs_reset_store(data, val);
     55
     56	return 0;
     57}
     58
     59DEFINE_SIMPLE_ATTRIBUTE(reset_fops, __intel_gt_debugfs_reset_show,
     60			__intel_gt_debugfs_reset_store, "%llu\n");
     61
     62static int steering_show(struct seq_file *m, void *data)
     63{
     64	struct drm_printer p = drm_seq_file_printer(m);
     65	struct intel_gt *gt = m->private;
     66
     67	intel_gt_report_steering(&p, gt, true);
     68
     69	return 0;
     70}
     71DEFINE_INTEL_GT_DEBUGFS_ATTRIBUTE(steering);
     72
     73static void gt_debugfs_register(struct intel_gt *gt, struct dentry *root)
     74{
     75	static const struct intel_gt_debugfs_file files[] = {
     76		{ "reset", &reset_fops, NULL },
     77		{ "steering", &steering_fops },
     78	};
     79
     80	intel_gt_debugfs_register_files(root, files, ARRAY_SIZE(files), gt);
     81}
     82
     83void intel_gt_debugfs_register(struct intel_gt *gt)
     84{
     85	struct dentry *root;
     86
     87	if (!gt->i915->drm.primary->debugfs_root)
     88		return;
     89
     90	root = debugfs_create_dir("gt", gt->i915->drm.primary->debugfs_root);
     91	if (IS_ERR(root))
     92		return;
     93
     94	gt_debugfs_register(gt, root);
     95
     96	intel_gt_engines_debugfs_register(gt, root);
     97	intel_gt_pm_debugfs_register(gt, root);
     98	intel_sseu_debugfs_register(gt, root);
     99
    100	intel_uc_debugfs_register(&gt->uc, root);
    101	intel_pxp_debugfs_register(&gt->pxp, root);
    102}
    103
    104void intel_gt_debugfs_register_files(struct dentry *root,
    105				     const struct intel_gt_debugfs_file *files,
    106				     unsigned long count, void *data)
    107{
    108	while (count--) {
    109		umode_t mode = files->fops->write ? 0644 : 0444;
    110
    111		if (!files->eval || files->eval(data))
    112			debugfs_create_file(files->name,
    113					    mode, root, data,
    114					    files->fops);
    115
    116		files++;
    117	}
    118}