cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel_gt_gmch.h (1268B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2022 Intel Corporation
      4 */
      5
      6#ifndef __INTEL_GT_GMCH_H__
      7#define __INTEL_GT_GMCH_H__
      8
      9#include "intel_gtt.h"
     10
     11/* For x86 platforms */
     12#if IS_ENABLED(CONFIG_X86)
     13void intel_gt_gmch_gen5_chipset_flush(struct intel_gt *gt);
     14int intel_gt_gmch_gen6_probe(struct i915_ggtt *ggtt);
     15int intel_gt_gmch_gen8_probe(struct i915_ggtt *ggtt);
     16int intel_gt_gmch_gen5_probe(struct i915_ggtt *ggtt);
     17int intel_gt_gmch_gen5_enable_hw(struct drm_i915_private *i915);
     18
     19/* Stubs for non-x86 platforms */
     20#else
     21static inline void intel_gt_gmch_gen5_chipset_flush(struct intel_gt *gt)
     22{
     23}
     24static inline int intel_gt_gmch_gen5_probe(struct i915_ggtt *ggtt)
     25{
     26	/* No HW should be probed for this case yet, return fail */
     27	return -ENODEV;
     28}
     29static inline int intel_gt_gmch_gen6_probe(struct i915_ggtt *ggtt)
     30{
     31	/* No HW should be probed for this case yet, return fail */
     32	return -ENODEV;
     33}
     34static inline int intel_gt_gmch_gen8_probe(struct i915_ggtt *ggtt)
     35{
     36	/* No HW should be probed for this case yet, return fail */
     37	return -ENODEV;
     38}
     39static inline int intel_gt_gmch_gen5_enable_hw(struct drm_i915_private *i915)
     40{
     41	/* No HW should be enabled for this case yet, return fail */
     42	return -ENODEV;
     43}
     44#endif
     45
     46#endif /* __INTEL_GT_GMCH_H__ */