cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
Log | Files | Refs | README | LICENSE | sfeed.txt

intel_guc_slpc.h (1444B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2021 Intel Corporation
      4 */
      5
      6#ifndef _INTEL_GUC_SLPC_H_
      7#define _INTEL_GUC_SLPC_H_
      8
      9#include "intel_guc_submission.h"
     10#include "intel_guc_slpc_types.h"
     11
     12struct intel_gt;
     13struct drm_printer;
     14
     15static inline bool intel_guc_slpc_is_supported(struct intel_guc *guc)
     16{
     17	return guc->slpc.supported;
     18}
     19
     20static inline bool intel_guc_slpc_is_wanted(struct intel_guc *guc)
     21{
     22	return guc->slpc.selected;
     23}
     24
     25static inline bool intel_guc_slpc_is_used(struct intel_guc *guc)
     26{
     27	return intel_guc_submission_is_used(guc) && intel_guc_slpc_is_wanted(guc);
     28}
     29
     30void intel_guc_slpc_init_early(struct intel_guc_slpc *slpc);
     31
     32int intel_guc_slpc_init(struct intel_guc_slpc *slpc);
     33int intel_guc_slpc_enable(struct intel_guc_slpc *slpc);
     34void intel_guc_slpc_fini(struct intel_guc_slpc *slpc);
     35int intel_guc_slpc_set_max_freq(struct intel_guc_slpc *slpc, u32 val);
     36int intel_guc_slpc_set_min_freq(struct intel_guc_slpc *slpc, u32 val);
     37int intel_guc_slpc_set_boost_freq(struct intel_guc_slpc *slpc, u32 val);
     38int intel_guc_slpc_get_max_freq(struct intel_guc_slpc *slpc, u32 *val);
     39int intel_guc_slpc_get_min_freq(struct intel_guc_slpc *slpc, u32 *val);
     40int intel_guc_slpc_print_info(struct intel_guc_slpc *slpc, struct drm_printer *p);
     41void intel_guc_pm_intrmsk_enable(struct intel_gt *gt);
     42void intel_guc_slpc_boost(struct intel_guc_slpc *slpc);
     43void intel_guc_slpc_dec_waiters(struct intel_guc_slpc *slpc);
     44
     45#endif