cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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i915_memcpy.h (1194B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2019 Intel Corporation
      4 */
      5
      6#ifndef __I915_MEMCPY_H__
      7#define __I915_MEMCPY_H__
      8
      9#include <linux/types.h>
     10
     11struct drm_i915_private;
     12
     13void i915_memcpy_init_early(struct drm_i915_private *i915);
     14
     15bool i915_memcpy_from_wc(void *dst, const void *src, unsigned long len);
     16void i915_unaligned_memcpy_from_wc(void *dst, const void *src, unsigned long len);
     17
     18/* The movntdqa instructions used for memcpy-from-wc require 16-byte alignment,
     19 * as well as SSE4.1 support. i915_memcpy_from_wc() will report if it cannot
     20 * perform the operation. To check beforehand, pass in the parameters to
     21 * to i915_can_memcpy_from_wc() - since we only care about the low 4 bits,
     22 * you only need to pass in the minor offsets, page-aligned pointers are
     23 * always valid.
     24 *
     25 * For just checking for SSE4.1, in the foreknowledge that the future use
     26 * will be correctly aligned, just use i915_has_memcpy_from_wc().
     27 */
     28#define i915_can_memcpy_from_wc(dst, src, len) \
     29	i915_memcpy_from_wc((void *)((unsigned long)(dst) | (unsigned long)(src) | (len)), NULL, 0)
     30
     31#define i915_has_memcpy_from_wc() \
     32	i915_memcpy_from_wc(NULL, NULL, 0)
     33
     34#endif /* __I915_MEMCPY_H__ */