cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel_gvt.h (2508B)

      1/*
      2 * Copyright(c) 2011-2016 Intel Corporation. All rights reserved.
      3 *
      4 * Permission is hereby granted, free of charge, to any person obtaining a
      5 * copy of this software and associated documentation files (the "Software"),
      6 * to deal in the Software without restriction, including without limitation
      7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
      8 * and/or sell copies of the Software, and to permit persons to whom the
      9 * Software is furnished to do so, subject to the following conditions:
     10 *
     11 * The above copyright notice and this permission notice (including the next
     12 * paragraph) shall be included in all copies or substantial portions of the
     13 * Software.
     14 *
     15 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
     16 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
     17 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
     18 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
     19 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
     20 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
     21 * SOFTWARE.
     22 */
     23
     24#ifndef _INTEL_GVT_H_
     25#define _INTEL_GVT_H_
     26
     27#include <linux/types.h>
     28
     29struct drm_i915_private;
     30
     31#ifdef CONFIG_DRM_I915_GVT
     32
     33struct intel_gvt_mmio_table_iter {
     34	struct drm_i915_private *i915;
     35	void *data;
     36	int (*handle_mmio_cb)(struct intel_gvt_mmio_table_iter *iter,
     37			      u32 offset, u32 size);
     38};
     39
     40int intel_gvt_init(struct drm_i915_private *dev_priv);
     41void intel_gvt_driver_remove(struct drm_i915_private *dev_priv);
     42int intel_gvt_init_host(void);
     43void intel_gvt_resume(struct drm_i915_private *dev_priv);
     44int intel_gvt_iterate_mmio_table(struct intel_gvt_mmio_table_iter *iter);
     45
     46struct intel_vgpu_ops {
     47	int (*init_device)(struct drm_i915_private *dev_priv);
     48	void (*clean_device)(struct drm_i915_private *dev_priv);
     49	void (*pm_resume)(struct drm_i915_private *i915);
     50};
     51
     52int intel_gvt_set_ops(const struct intel_vgpu_ops *ops);
     53void intel_gvt_clear_ops(const struct intel_vgpu_ops *ops);
     54
     55#else
     56static inline int intel_gvt_init(struct drm_i915_private *dev_priv)
     57{
     58	return 0;
     59}
     60
     61static inline void intel_gvt_driver_remove(struct drm_i915_private *dev_priv)
     62{
     63}
     64
     65static inline void intel_gvt_resume(struct drm_i915_private *dev_priv)
     66{
     67}
     68
     69struct intel_gvt_mmio_table_iter {
     70};
     71
     72static inline int intel_gvt_iterate_mmio_table(struct intel_gvt_mmio_table_iter *iter)
     73{
     74	return 0;
     75}
     76#endif
     77
     78#endif /* _INTEL_GVT_H_ */