intel_step.c (8045B)
1// SPDX-License-Identifier: MIT 2/* 3 * Copyright © 2020,2021 Intel Corporation 4 */ 5 6#include "i915_drv.h" 7#include "intel_step.h" 8 9/* 10 * Some platforms have unusual ways of mapping PCI revision ID to GT/display 11 * steppings. E.g., in some cases a higher PCI revision may translate to a 12 * lower stepping of the GT and/or display IP. This file provides lookup 13 * tables to map the PCI revision into a standard set of stepping values that 14 * can be compared numerically. 15 * 16 * Also note that some revisions/steppings may have been set aside as 17 * placeholders but never materialized in real hardware; in those cases there 18 * may be jumps in the revision IDs or stepping values in the tables below. 19 */ 20 21/* 22 * Some platforms always have the same stepping value for GT and display; 23 * use a macro to define these to make it easier to identify the platforms 24 * where the two steppings can deviate. 25 */ 26#define COMMON_STEP(x) .graphics_step = STEP_##x, .display_step = STEP_##x, .media_step = STEP_##x 27#define COMMON_GT_MEDIA_STEP(x) .graphics_step = STEP_##x, .media_step = STEP_##x 28 29static const struct intel_step_info skl_revids[] = { 30 [0x6] = { COMMON_STEP(G0) }, 31 [0x7] = { COMMON_STEP(H0) }, 32 [0x9] = { COMMON_STEP(J0) }, 33 [0xA] = { COMMON_STEP(I1) }, 34}; 35 36static const struct intel_step_info kbl_revids[] = { 37 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 38 [2] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 39 [3] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_B0 }, 40 [4] = { COMMON_GT_MEDIA_STEP(F0), .display_step = STEP_C0 }, 41 [5] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B1 }, 42 [6] = { COMMON_GT_MEDIA_STEP(D1), .display_step = STEP_B1 }, 43 [7] = { COMMON_GT_MEDIA_STEP(G0), .display_step = STEP_C0 }, 44}; 45 46static const struct intel_step_info bxt_revids[] = { 47 [0xA] = { COMMON_STEP(C0) }, 48 [0xB] = { COMMON_STEP(C0) }, 49 [0xC] = { COMMON_STEP(D0) }, 50 [0xD] = { COMMON_STEP(E0) }, 51}; 52 53static const struct intel_step_info glk_revids[] = { 54 [3] = { COMMON_STEP(B0) }, 55}; 56 57static const struct intel_step_info icl_revids[] = { 58 [7] = { COMMON_STEP(D0) }, 59}; 60 61static const struct intel_step_info jsl_ehl_revids[] = { 62 [0] = { COMMON_STEP(A0) }, 63 [1] = { COMMON_STEP(B0) }, 64}; 65 66static const struct intel_step_info tgl_uy_revids[] = { 67 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 68 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 69 [2] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 70 [3] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 71}; 72 73/* Same GT stepping between tgl_uy_revids and tgl_revids don't mean the same HW */ 74static const struct intel_step_info tgl_revids[] = { 75 [0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 76 [1] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_D0 }, 77}; 78 79static const struct intel_step_info rkl_revids[] = { 80 [0] = { COMMON_STEP(A0) }, 81 [1] = { COMMON_STEP(B0) }, 82 [4] = { COMMON_STEP(C0) }, 83}; 84 85static const struct intel_step_info dg1_revids[] = { 86 [0] = { COMMON_STEP(A0) }, 87 [1] = { COMMON_STEP(B0) }, 88}; 89 90static const struct intel_step_info adls_revids[] = { 91 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 92 [0x1] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A2 }, 93 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 94 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_B0 }, 95 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 96}; 97 98static const struct intel_step_info adlp_revids[] = { 99 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 100 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 101 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 102 [0xC] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_D0 }, 103}; 104 105static const struct intel_step_info xehpsdv_revids[] = { 106 [0x0] = { COMMON_GT_MEDIA_STEP(A0) }, 107 [0x1] = { COMMON_GT_MEDIA_STEP(A1) }, 108 [0x4] = { COMMON_GT_MEDIA_STEP(B0) }, 109 [0x8] = { COMMON_GT_MEDIA_STEP(C0) }, 110}; 111 112static const struct intel_step_info dg2_g10_revid_step_tbl[] = { 113 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_A0 }, 114 [0x1] = { COMMON_GT_MEDIA_STEP(A1), .display_step = STEP_A0 }, 115 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_B0 }, 116 [0x8] = { COMMON_GT_MEDIA_STEP(C0), .display_step = STEP_C0 }, 117}; 118 119static const struct intel_step_info dg2_g11_revid_step_tbl[] = { 120 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_B0 }, 121 [0x4] = { COMMON_GT_MEDIA_STEP(B0), .display_step = STEP_C0 }, 122 [0x5] = { COMMON_GT_MEDIA_STEP(B1), .display_step = STEP_C0 }, 123}; 124 125static const struct intel_step_info dg2_g12_revid_step_tbl[] = { 126 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_C0 }, 127}; 128 129static const struct intel_step_info adls_rpls_revids[] = { 130 [0x4] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_D0 }, 131 [0xC] = { COMMON_GT_MEDIA_STEP(D0), .display_step = STEP_C0 }, 132}; 133 134static const struct intel_step_info adlp_n_revids[] = { 135 [0x0] = { COMMON_GT_MEDIA_STEP(A0), .display_step = STEP_D0 }, 136}; 137 138void intel_step_init(struct drm_i915_private *i915) 139{ 140 const struct intel_step_info *revids = NULL; 141 int size = 0; 142 int revid = INTEL_REVID(i915); 143 struct intel_step_info step = {}; 144 145 if (IS_DG2_G10(i915)) { 146 revids = dg2_g10_revid_step_tbl; 147 size = ARRAY_SIZE(dg2_g10_revid_step_tbl); 148 } else if (IS_DG2_G11(i915)) { 149 revids = dg2_g11_revid_step_tbl; 150 size = ARRAY_SIZE(dg2_g11_revid_step_tbl); 151 } else if (IS_DG2_G12(i915)) { 152 revids = dg2_g12_revid_step_tbl; 153 size = ARRAY_SIZE(dg2_g12_revid_step_tbl); 154 } else if (IS_XEHPSDV(i915)) { 155 revids = xehpsdv_revids; 156 size = ARRAY_SIZE(xehpsdv_revids); 157 } else if (IS_ADLP_N(i915)) { 158 revids = adlp_n_revids; 159 size = ARRAY_SIZE(adlp_n_revids); 160 } else if (IS_ALDERLAKE_P(i915)) { 161 revids = adlp_revids; 162 size = ARRAY_SIZE(adlp_revids); 163 } else if (IS_ADLS_RPLS(i915)) { 164 revids = adls_rpls_revids; 165 size = ARRAY_SIZE(adls_rpls_revids); 166 } else if (IS_ALDERLAKE_S(i915)) { 167 revids = adls_revids; 168 size = ARRAY_SIZE(adls_revids); 169 } else if (IS_DG1(i915)) { 170 revids = dg1_revids; 171 size = ARRAY_SIZE(dg1_revids); 172 } else if (IS_ROCKETLAKE(i915)) { 173 revids = rkl_revids; 174 size = ARRAY_SIZE(rkl_revids); 175 } else if (IS_TGL_UY(i915)) { 176 revids = tgl_uy_revids; 177 size = ARRAY_SIZE(tgl_uy_revids); 178 } else if (IS_TIGERLAKE(i915)) { 179 revids = tgl_revids; 180 size = ARRAY_SIZE(tgl_revids); 181 } else if (IS_JSL_EHL(i915)) { 182 revids = jsl_ehl_revids; 183 size = ARRAY_SIZE(jsl_ehl_revids); 184 } else if (IS_ICELAKE(i915)) { 185 revids = icl_revids; 186 size = ARRAY_SIZE(icl_revids); 187 } else if (IS_GEMINILAKE(i915)) { 188 revids = glk_revids; 189 size = ARRAY_SIZE(glk_revids); 190 } else if (IS_BROXTON(i915)) { 191 revids = bxt_revids; 192 size = ARRAY_SIZE(bxt_revids); 193 } else if (IS_KABYLAKE(i915)) { 194 revids = kbl_revids; 195 size = ARRAY_SIZE(kbl_revids); 196 } else if (IS_SKYLAKE(i915)) { 197 revids = skl_revids; 198 size = ARRAY_SIZE(skl_revids); 199 } 200 201 /* Not using the stepping scheme for the platform yet. */ 202 if (!revids) 203 return; 204 205 if (revid < size && revids[revid].graphics_step != STEP_NONE) { 206 step = revids[revid]; 207 } else { 208 drm_warn(&i915->drm, "Unknown revid 0x%02x\n", revid); 209 210 /* 211 * If we hit a gap in the revid array, use the information for 212 * the next revid. 213 * 214 * This may be wrong in all sorts of ways, especially if the 215 * steppings in the array are not monotonically increasing, but 216 * it's better than defaulting to 0. 217 */ 218 while (revid < size && revids[revid].graphics_step == STEP_NONE) 219 revid++; 220 221 if (revid < size) { 222 drm_dbg(&i915->drm, "Using steppings for revid 0x%02x\n", 223 revid); 224 step = revids[revid]; 225 } else { 226 drm_dbg(&i915->drm, "Using future steppings\n"); 227 step.graphics_step = STEP_FUTURE; 228 step.display_step = STEP_FUTURE; 229 } 230 } 231 232 if (drm_WARN_ON(&i915->drm, step.graphics_step == STEP_NONE)) 233 return; 234 235 RUNTIME_INFO(i915)->step = step; 236} 237 238#define STEP_NAME_CASE(name) \ 239 case STEP_##name: \ 240 return #name; 241 242const char *intel_step_name(enum intel_step step) 243{ 244 switch (step) { 245 STEP_NAME_LIST(STEP_NAME_CASE); 246 247 default: 248 return "**"; 249 } 250}