cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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intel_step.h (947B)

      1/* SPDX-License-Identifier: MIT */
      2/*
      3 * Copyright © 2020,2021 Intel Corporation
      4 */
      5
      6#ifndef __INTEL_STEP_H__
      7#define __INTEL_STEP_H__
      8
      9#include <linux/types.h>
     10
     11struct drm_i915_private;
     12
     13struct intel_step_info {
     14	u8 graphics_step;
     15	u8 display_step;
     16	u8 media_step;
     17};
     18
     19#define STEP_ENUM_VAL(name)  STEP_##name,
     20
     21#define STEP_NAME_LIST(func)		\
     22	func(A0)			\
     23	func(A1)			\
     24	func(A2)			\
     25	func(B0)			\
     26	func(B1)			\
     27	func(B2)			\
     28	func(C0)			\
     29	func(C1)			\
     30	func(D0)			\
     31	func(D1)			\
     32	func(E0)			\
     33	func(F0)			\
     34	func(G0)			\
     35	func(H0)			\
     36	func(I0)			\
     37	func(I1)			\
     38	func(J0)
     39
     40/*
     41 * Symbolic steppings that do not match the hardware. These are valid both as gt
     42 * and display steppings as symbolic names.
     43 */
     44enum intel_step {
     45	STEP_NONE = 0,
     46	STEP_NAME_LIST(STEP_ENUM_VAL)
     47	STEP_FUTURE,
     48	STEP_FOREVER,
     49};
     50
     51void intel_step_init(struct drm_i915_private *i915);
     52const char *intel_step_name(enum intel_step step);
     53
     54#endif /* __INTEL_STEP_H__ */