mgag200_drv.c (9212B)
1// SPDX-License-Identifier: GPL-2.0-only 2/* 3 * Copyright 2012 Red Hat 4 * 5 * Authors: Matthew Garrett 6 * Dave Airlie 7 */ 8 9#include <linux/module.h> 10#include <linux/pci.h> 11#include <linux/vmalloc.h> 12 13#include <drm/drm_aperture.h> 14#include <drm/drm_drv.h> 15#include <drm/drm_file.h> 16#include <drm/drm_ioctl.h> 17#include <drm/drm_managed.h> 18#include <drm/drm_module.h> 19#include <drm/drm_pciids.h> 20 21#include "mgag200_drv.h" 22 23int mgag200_modeset = -1; 24MODULE_PARM_DESC(modeset, "Disable/Enable modesetting"); 25module_param_named(modeset, mgag200_modeset, int, 0400); 26 27/* 28 * DRM driver 29 */ 30 31DEFINE_DRM_GEM_FOPS(mgag200_driver_fops); 32 33static const struct drm_driver mgag200_driver = { 34 .driver_features = DRIVER_ATOMIC | DRIVER_GEM | DRIVER_MODESET, 35 .fops = &mgag200_driver_fops, 36 .name = DRIVER_NAME, 37 .desc = DRIVER_DESC, 38 .date = DRIVER_DATE, 39 .major = DRIVER_MAJOR, 40 .minor = DRIVER_MINOR, 41 .patchlevel = DRIVER_PATCHLEVEL, 42 DRM_GEM_SHMEM_DRIVER_OPS, 43}; 44 45/* 46 * DRM device 47 */ 48 49static bool mgag200_has_sgram(struct mga_device *mdev) 50{ 51 struct drm_device *dev = &mdev->base; 52 struct pci_dev *pdev = to_pci_dev(dev->dev); 53 u32 option; 54 int ret; 55 56 ret = pci_read_config_dword(pdev, PCI_MGA_OPTION, &option); 57 if (drm_WARN(dev, ret, "failed to read PCI config dword: %d\n", ret)) 58 return false; 59 60 return !!(option & PCI_MGA_OPTION_HARDPWMSK); 61} 62 63static int mgag200_regs_init(struct mga_device *mdev) 64{ 65 struct drm_device *dev = &mdev->base; 66 struct pci_dev *pdev = to_pci_dev(dev->dev); 67 u32 option, option2; 68 u8 crtcext3; 69 int ret; 70 71 ret = drmm_mutex_init(dev, &mdev->rmmio_lock); 72 if (ret) 73 return ret; 74 75 switch (mdev->type) { 76 case G200_PCI: 77 case G200_AGP: 78 if (mgag200_has_sgram(mdev)) 79 option = 0x4049cd21; 80 else 81 option = 0x40499121; 82 option2 = 0x00008000; 83 break; 84 case G200_SE_A: 85 case G200_SE_B: 86 option = 0x40049120; 87 if (mgag200_has_sgram(mdev)) 88 option |= PCI_MGA_OPTION_HARDPWMSK; 89 option2 = 0x00008000; 90 break; 91 case G200_WB: 92 case G200_EW3: 93 option = 0x41049120; 94 option2 = 0x0000b000; 95 break; 96 case G200_EV: 97 option = 0x00000120; 98 option2 = 0x0000b000; 99 break; 100 case G200_EH: 101 case G200_EH3: 102 option = 0x00000120; 103 option2 = 0x0000b000; 104 break; 105 default: 106 option = 0; 107 option2 = 0; 108 } 109 110 if (option) 111 pci_write_config_dword(pdev, PCI_MGA_OPTION, option); 112 if (option2) 113 pci_write_config_dword(pdev, PCI_MGA_OPTION2, option2); 114 115 /* BAR 1 contains registers */ 116 mdev->rmmio_base = pci_resource_start(pdev, 1); 117 mdev->rmmio_size = pci_resource_len(pdev, 1); 118 119 if (!devm_request_mem_region(dev->dev, mdev->rmmio_base, 120 mdev->rmmio_size, "mgadrmfb_mmio")) { 121 drm_err(dev, "can't reserve mmio registers\n"); 122 return -ENOMEM; 123 } 124 125 mdev->rmmio = pcim_iomap(pdev, 1, 0); 126 if (mdev->rmmio == NULL) 127 return -ENOMEM; 128 129 RREG_ECRT(0x03, crtcext3); 130 crtcext3 |= MGAREG_CRTCEXT3_MGAMODE; 131 WREG_ECRT(0x03, crtcext3); 132 133 return 0; 134} 135 136static void mgag200_g200_interpret_bios(struct mga_device *mdev, 137 const unsigned char *bios, 138 size_t size) 139{ 140 static const char matrox[] = {'M', 'A', 'T', 'R', 'O', 'X'}; 141 static const unsigned int expected_length[6] = { 142 0, 64, 64, 64, 128, 128 143 }; 144 struct drm_device *dev = &mdev->base; 145 const unsigned char *pins; 146 unsigned int pins_len, version; 147 int offset; 148 int tmp; 149 150 /* Test for MATROX string. */ 151 if (size < 45 + sizeof(matrox)) 152 return; 153 if (memcmp(&bios[45], matrox, sizeof(matrox)) != 0) 154 return; 155 156 /* Get the PInS offset. */ 157 if (size < MGA_BIOS_OFFSET + 2) 158 return; 159 offset = (bios[MGA_BIOS_OFFSET + 1] << 8) | bios[MGA_BIOS_OFFSET]; 160 161 /* Get PInS data structure. */ 162 163 if (size < offset + 6) 164 return; 165 pins = bios + offset; 166 if (pins[0] == 0x2e && pins[1] == 0x41) { 167 version = pins[5]; 168 pins_len = pins[2]; 169 } else { 170 version = 1; 171 pins_len = pins[0] + (pins[1] << 8); 172 } 173 174 if (version < 1 || version > 5) { 175 drm_warn(dev, "Unknown BIOS PInS version: %d\n", version); 176 return; 177 } 178 if (pins_len != expected_length[version]) { 179 drm_warn(dev, "Unexpected BIOS PInS size: %d expected: %d\n", 180 pins_len, expected_length[version]); 181 return; 182 } 183 if (size < offset + pins_len) 184 return; 185 186 drm_dbg_kms(dev, "MATROX BIOS PInS version %d size: %d found\n", 187 version, pins_len); 188 189 /* Extract the clock values */ 190 191 switch (version) { 192 case 1: 193 tmp = pins[24] + (pins[25] << 8); 194 if (tmp) 195 mdev->model.g200.pclk_max = tmp * 10; 196 break; 197 case 2: 198 if (pins[41] != 0xff) 199 mdev->model.g200.pclk_max = (pins[41] + 100) * 1000; 200 break; 201 case 3: 202 if (pins[36] != 0xff) 203 mdev->model.g200.pclk_max = (pins[36] + 100) * 1000; 204 if (pins[52] & 0x20) 205 mdev->model.g200.ref_clk = 14318; 206 break; 207 case 4: 208 if (pins[39] != 0xff) 209 mdev->model.g200.pclk_max = pins[39] * 4 * 1000; 210 if (pins[92] & 0x01) 211 mdev->model.g200.ref_clk = 14318; 212 break; 213 case 5: 214 tmp = pins[4] ? 8000 : 6000; 215 if (pins[123] != 0xff) 216 mdev->model.g200.pclk_min = pins[123] * tmp; 217 if (pins[38] != 0xff) 218 mdev->model.g200.pclk_max = pins[38] * tmp; 219 if (pins[110] & 0x01) 220 mdev->model.g200.ref_clk = 14318; 221 break; 222 default: 223 break; 224 } 225} 226 227static void mgag200_g200_init_refclk(struct mga_device *mdev) 228{ 229 struct drm_device *dev = &mdev->base; 230 struct pci_dev *pdev = to_pci_dev(dev->dev); 231 unsigned char __iomem *rom; 232 unsigned char *bios; 233 size_t size; 234 235 mdev->model.g200.pclk_min = 50000; 236 mdev->model.g200.pclk_max = 230000; 237 mdev->model.g200.ref_clk = 27050; 238 239 rom = pci_map_rom(pdev, &size); 240 if (!rom) 241 return; 242 243 bios = vmalloc(size); 244 if (!bios) 245 goto out; 246 memcpy_fromio(bios, rom, size); 247 248 if (size != 0 && bios[0] == 0x55 && bios[1] == 0xaa) 249 mgag200_g200_interpret_bios(mdev, bios, size); 250 251 drm_dbg_kms(dev, "pclk_min: %ld pclk_max: %ld ref_clk: %ld\n", 252 mdev->model.g200.pclk_min, mdev->model.g200.pclk_max, 253 mdev->model.g200.ref_clk); 254 255 vfree(bios); 256out: 257 pci_unmap_rom(pdev, rom); 258} 259 260static void mgag200_g200se_init_unique_id(struct mga_device *mdev) 261{ 262 struct drm_device *dev = &mdev->base; 263 264 /* stash G200 SE model number for later use */ 265 mdev->model.g200se.unique_rev_id = RREG32(0x1e24); 266 267 drm_dbg(dev, "G200 SE unique revision id is 0x%x\n", 268 mdev->model.g200se.unique_rev_id); 269} 270 271static struct mga_device * 272mgag200_device_create(struct pci_dev *pdev, enum mga_type type, unsigned long flags) 273{ 274 struct mga_device *mdev; 275 struct drm_device *dev; 276 int ret; 277 278 mdev = devm_drm_dev_alloc(&pdev->dev, &mgag200_driver, struct mga_device, base); 279 if (IS_ERR(mdev)) 280 return mdev; 281 dev = &mdev->base; 282 283 pci_set_drvdata(pdev, dev); 284 285 mdev->flags = flags; 286 mdev->type = type; 287 288 ret = mgag200_regs_init(mdev); 289 if (ret) 290 return ERR_PTR(ret); 291 292 if (mdev->type == G200_PCI || mdev->type == G200_AGP) 293 mgag200_g200_init_refclk(mdev); 294 else if (IS_G200_SE(mdev)) 295 mgag200_g200se_init_unique_id(mdev); 296 297 ret = mgag200_mm_init(mdev); 298 if (ret) 299 return ERR_PTR(ret); 300 301 ret = mgag200_modeset_init(mdev); 302 if (ret) 303 return ERR_PTR(ret); 304 305 return mdev; 306} 307 308/* 309 * PCI driver 310 */ 311 312static const struct pci_device_id mgag200_pciidlist[] = { 313 { PCI_VENDOR_ID_MATROX, 0x520, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_PCI }, 314 { PCI_VENDOR_ID_MATROX, 0x521, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_AGP }, 315 { PCI_VENDOR_ID_MATROX, 0x522, PCI_ANY_ID, PCI_ANY_ID, 0, 0, 316 G200_SE_A | MGAG200_FLAG_HW_BUG_NO_STARTADD}, 317 { PCI_VENDOR_ID_MATROX, 0x524, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_SE_B }, 318 { PCI_VENDOR_ID_MATROX, 0x530, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EV }, 319 { PCI_VENDOR_ID_MATROX, 0x532, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_WB }, 320 { PCI_VENDOR_ID_MATROX, 0x533, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH }, 321 { PCI_VENDOR_ID_MATROX, 0x534, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_ER }, 322 { PCI_VENDOR_ID_MATROX, 0x536, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EW3 }, 323 { PCI_VENDOR_ID_MATROX, 0x538, PCI_ANY_ID, PCI_ANY_ID, 0, 0, G200_EH3 }, 324 {0,} 325}; 326 327MODULE_DEVICE_TABLE(pci, mgag200_pciidlist); 328 329static enum mga_type mgag200_type_from_driver_data(kernel_ulong_t driver_data) 330{ 331 return (enum mga_type)(driver_data & MGAG200_TYPE_MASK); 332} 333 334static unsigned long mgag200_flags_from_driver_data(kernel_ulong_t driver_data) 335{ 336 return driver_data & MGAG200_FLAG_MASK; 337} 338 339static int 340mgag200_pci_probe(struct pci_dev *pdev, const struct pci_device_id *ent) 341{ 342 kernel_ulong_t driver_data = ent->driver_data; 343 enum mga_type type = mgag200_type_from_driver_data(driver_data); 344 unsigned long flags = mgag200_flags_from_driver_data(driver_data); 345 struct mga_device *mdev; 346 struct drm_device *dev; 347 int ret; 348 349 ret = drm_aperture_remove_conflicting_pci_framebuffers(pdev, &mgag200_driver); 350 if (ret) 351 return ret; 352 353 ret = pcim_enable_device(pdev); 354 if (ret) 355 return ret; 356 357 mdev = mgag200_device_create(pdev, type, flags); 358 if (IS_ERR(mdev)) 359 return PTR_ERR(mdev); 360 dev = &mdev->base; 361 362 ret = drm_dev_register(dev, 0); 363 if (ret) 364 return ret; 365 366 drm_fbdev_generic_setup(dev, 0); 367 368 return 0; 369} 370 371static void mgag200_pci_remove(struct pci_dev *pdev) 372{ 373 struct drm_device *dev = pci_get_drvdata(pdev); 374 375 drm_dev_unregister(dev); 376} 377 378static struct pci_driver mgag200_pci_driver = { 379 .name = DRIVER_NAME, 380 .id_table = mgag200_pciidlist, 381 .probe = mgag200_pci_probe, 382 .remove = mgag200_pci_remove, 383}; 384 385drm_module_pci_driver_if_modeset(mgag200_pci_driver, mgag200_modeset); 386 387MODULE_AUTHOR(DRIVER_AUTHOR); 388MODULE_DESCRIPTION(DRIVER_DESC); 389MODULE_LICENSE("GPL");