cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dpu_hw_intf.h (2984B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/* Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
      3 */
      4
      5#ifndef _DPU_HW_INTF_H
      6#define _DPU_HW_INTF_H
      7
      8#include "dpu_hw_catalog.h"
      9#include "dpu_hw_mdss.h"
     10#include "dpu_hw_util.h"
     11#include "dpu_hw_blk.h"
     12
     13struct dpu_hw_intf;
     14
     15/* intf timing settings */
     16struct intf_timing_params {
     17	u32 width;		/* active width */
     18	u32 height;		/* active height */
     19	u32 xres;		/* Display panel width */
     20	u32 yres;		/* Display panel height */
     21
     22	u32 h_back_porch;
     23	u32 h_front_porch;
     24	u32 v_back_porch;
     25	u32 v_front_porch;
     26	u32 hsync_pulse_width;
     27	u32 vsync_pulse_width;
     28	u32 hsync_polarity;
     29	u32 vsync_polarity;
     30	u32 border_clr;
     31	u32 underflow_clr;
     32	u32 hsync_skew;
     33
     34	bool wide_bus_en;
     35};
     36
     37struct intf_prog_fetch {
     38	u8 enable;
     39	/* vsync counter for the front porch pixel line */
     40	u32 fetch_start;
     41};
     42
     43struct intf_status {
     44	u8 is_en;		/* interface timing engine is enabled or not */
     45	u8 is_prog_fetch_en;	/* interface prog fetch counter is enabled or not */
     46	u32 frame_count;	/* frame count since timing engine enabled */
     47	u32 line_count;		/* current line count including blanking */
     48};
     49
     50/**
     51 * struct dpu_hw_intf_ops : Interface to the interface Hw driver functions
     52 *  Assumption is these functions will be called after clocks are enabled
     53 * @ setup_timing_gen : programs the timing engine
     54 * @ setup_prog_fetch : enables/disables the programmable fetch logic
     55 * @ enable_timing: enable/disable timing engine
     56 * @ get_status: returns if timing engine is enabled or not
     57 * @ get_line_count: reads current vertical line counter
     58 * @bind_pingpong_blk: enable/disable the connection with pingpong which will
     59 *                     feed pixels to this interface
     60 */
     61struct dpu_hw_intf_ops {
     62	void (*setup_timing_gen)(struct dpu_hw_intf *intf,
     63			const struct intf_timing_params *p,
     64			const struct dpu_format *fmt);
     65
     66	void (*setup_prg_fetch)(struct dpu_hw_intf *intf,
     67			const struct intf_prog_fetch *fetch);
     68
     69	void (*enable_timing)(struct dpu_hw_intf *intf,
     70			u8 enable);
     71
     72	void (*get_status)(struct dpu_hw_intf *intf,
     73			struct intf_status *status);
     74
     75	u32 (*get_line_count)(struct dpu_hw_intf *intf);
     76
     77	void (*bind_pingpong_blk)(struct dpu_hw_intf *intf,
     78			bool enable,
     79			const enum dpu_pingpong pp);
     80};
     81
     82struct dpu_hw_intf {
     83	struct dpu_hw_blk_reg_map hw;
     84
     85	/* intf */
     86	enum dpu_intf idx;
     87	const struct dpu_intf_cfg *cap;
     88	const struct dpu_mdss_cfg *mdss;
     89
     90	/* ops */
     91	struct dpu_hw_intf_ops ops;
     92};
     93
     94/**
     95 * dpu_hw_intf_init(): Initializes the intf driver for the passed
     96 * interface idx.
     97 * @idx:  interface index for which driver object is required
     98 * @addr: mapped register io address of MDP
     99 * @m :   pointer to mdss catalog data
    100 */
    101struct dpu_hw_intf *dpu_hw_intf_init(enum dpu_intf idx,
    102		void __iomem *addr,
    103		const struct dpu_mdss_cfg *m);
    104
    105/**
    106 * dpu_hw_intf_destroy(): Destroys INTF driver context
    107 * @intf:   Pointer to INTF driver context
    108 */
    109void dpu_hw_intf_destroy(struct dpu_hw_intf *intf);
    110
    111#endif /*_DPU_HW_INTF_H */