cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dpu_hw_wb.h (3033B)

      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (c) 2022 Qualcomm Innovation Center, Inc. All rights reserved
      4 */
      5
      6#ifndef _DPU_HW_WB_H
      7#define _DPU_HW_WB_H
      8
      9#include "dpu_hw_catalog.h"
     10#include "dpu_hw_mdss.h"
     11#include "dpu_hw_top.h"
     12#include "dpu_hw_util.h"
     13#include "dpu_hw_pingpong.h"
     14
     15struct dpu_hw_wb;
     16
     17struct dpu_hw_wb_cfg {
     18	struct dpu_hw_fmt_layout dest;
     19	enum dpu_intf_mode intf_mode;
     20	struct drm_rect roi;
     21	struct drm_rect crop;
     22};
     23
     24/**
     25 * enum CDP preload ahead address size
     26 */
     27enum {
     28	DPU_WB_CDP_PRELOAD_AHEAD_32,
     29	DPU_WB_CDP_PRELOAD_AHEAD_64
     30};
     31
     32/**
     33 * struct dpu_hw_wb_qos_cfg : Writeback pipe QoS configuration
     34 * @danger_lut: LUT for generate danger level based on fill level
     35 * @safe_lut: LUT for generate safe level based on fill level
     36 * @creq_lut: LUT for generate creq level based on fill level
     37 * @danger_safe_en: enable danger safe generation
     38 */
     39struct dpu_hw_wb_qos_cfg {
     40	u32 danger_lut;
     41	u32 safe_lut;
     42	u64 creq_lut;
     43	bool danger_safe_en;
     44};
     45
     46/**
     47 *
     48 * struct dpu_hw_wb_ops : Interface to the wb hw driver functions
     49 *  Assumption is these functions will be called after clocks are enabled
     50 *  @setup_outaddress: setup output address from the writeback job
     51 *  @setup_outformat: setup output format of writeback block from writeback job
     52 *  @setup_qos_lut:   setup qos LUT for writeback block based on input
     53 *  @setup_cdp:       setup chroma down prefetch block for writeback block
     54 *  @bind_pingpong_blk: enable/disable the connection with ping-pong block
     55 */
     56struct dpu_hw_wb_ops {
     57	void (*setup_outaddress)(struct dpu_hw_wb *ctx,
     58			struct dpu_hw_wb_cfg *wb);
     59
     60	void (*setup_outformat)(struct dpu_hw_wb *ctx,
     61			struct dpu_hw_wb_cfg *wb);
     62
     63	void (*setup_roi)(struct dpu_hw_wb *ctx,
     64			struct dpu_hw_wb_cfg *wb);
     65
     66	void (*setup_qos_lut)(struct dpu_hw_wb *ctx,
     67			struct dpu_hw_wb_qos_cfg *cfg);
     68
     69	void (*setup_cdp)(struct dpu_hw_wb *ctx,
     70			struct dpu_hw_cdp_cfg *cfg);
     71
     72	void (*bind_pingpong_blk)(struct dpu_hw_wb *ctx,
     73			bool enable, const enum dpu_pingpong pp);
     74};
     75
     76/**
     77 * struct dpu_hw_wb : WB driver object
     78 * @hw: block hardware details
     79 * @mdp: pointer to associated mdp portion of the catalog
     80 * @idx: hardware index number within type
     81 * @wb_hw_caps: hardware capabilities
     82 * @ops: function pointers
     83 * @hw_mdp: MDP top level hardware block
     84 */
     85struct dpu_hw_wb {
     86	struct dpu_hw_blk_reg_map hw;
     87	const struct dpu_mdp_cfg *mdp;
     88
     89	/* wb path */
     90	int idx;
     91	const struct dpu_wb_cfg *caps;
     92
     93	/* ops */
     94	struct dpu_hw_wb_ops ops;
     95
     96	struct dpu_hw_mdp *hw_mdp;
     97};
     98
     99/**
    100 * dpu_hw_wb_init(): Initializes and return writeback hw driver object.
    101 * @idx:  wb_path index for which driver object is required
    102 * @addr: mapped register io address of MDP
    103 * @m :   pointer to mdss catalog data
    104 */
    105struct dpu_hw_wb *dpu_hw_wb_init(enum dpu_wb idx,
    106		void __iomem *addr,
    107		const struct dpu_mdss_cfg *m);
    108
    109/**
    110 * dpu_hw_wb_destroy(): Destroy writeback hw driver object.
    111 * @hw_wb:  Pointer to writeback hw driver object
    112 */
    113void dpu_hw_wb_destroy(struct dpu_hw_wb *hw_wb);
    114
    115#endif /*_DPU_HW_WB_H */