cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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dpu_plane.h (4376B)


      1/* SPDX-License-Identifier: GPL-2.0-only */
      2/*
      3 * Copyright (c) 2015-2018, The Linux Foundation. All rights reserved.
      4 * Copyright (C) 2013 Red Hat
      5 * Author: Rob Clark <robdclark@gmail.com>
      6 */
      7
      8#ifndef _DPU_PLANE_H_
      9#define _DPU_PLANE_H_
     10
     11#include <drm/drm_crtc.h>
     12
     13#include "dpu_kms.h"
     14#include "dpu_hw_mdss.h"
     15#include "dpu_hw_sspp.h"
     16
     17/**
     18 * struct dpu_plane_state: Define dpu extension of drm plane state object
     19 * @base:	base drm plane state object
     20 * @aspace:	pointer to address space for input/output buffers
     21 * @stage:	assigned by crtc blender
     22 * @needs_qos_remap: qos remap settings need to be updated
     23 * @multirect_index: index of the rectangle of SSPP
     24 * @multirect_mode: parallel or time multiplex multirect mode
     25 * @pending:	whether the current update is still pending
     26 * @plane_fetch_bw: calculated BW per plane
     27 * @plane_clk: calculated clk per plane
     28 * @needs_dirtyfb: whether attached CRTC needs pixel data explicitly flushed
     29 * @rotation: simplified drm rotation hint
     30 */
     31struct dpu_plane_state {
     32	struct drm_plane_state base;
     33	struct msm_gem_address_space *aspace;
     34	enum dpu_stage stage;
     35	bool needs_qos_remap;
     36	uint32_t multirect_index;
     37	uint32_t multirect_mode;
     38	bool pending;
     39
     40	u64 plane_fetch_bw;
     41	u64 plane_clk;
     42
     43	bool needs_dirtyfb;
     44	unsigned int rotation;
     45};
     46
     47/**
     48 * struct dpu_multirect_plane_states: Defines multirect pair of drm plane states
     49 * @r0: drm plane configured on rect 0
     50 * @r1: drm plane configured on rect 1
     51 */
     52struct dpu_multirect_plane_states {
     53	const struct drm_plane_state *r0;
     54	const struct drm_plane_state *r1;
     55};
     56
     57#define to_dpu_plane_state(x) \
     58	container_of(x, struct dpu_plane_state, base)
     59
     60/**
     61 * dpu_plane_pipe - return sspp identifier for the given plane
     62 * @plane:   Pointer to DRM plane object
     63 * Returns: sspp identifier of the given plane
     64 */
     65enum dpu_sspp dpu_plane_pipe(struct drm_plane *plane);
     66
     67/**
     68 * is_dpu_plane_virtual - check for virtual plane
     69 * @plane: Pointer to DRM plane object
     70 * returns: true - if the plane is virtual
     71 *          false - if the plane is primary
     72 */
     73bool is_dpu_plane_virtual(struct drm_plane *plane);
     74
     75/**
     76 * dpu_plane_get_ctl_flush - get control flush mask
     77 * @plane:   Pointer to DRM plane object
     78 * @ctl: Pointer to control hardware
     79 * @flush_sspp: Pointer to sspp flush control word
     80 */
     81void dpu_plane_get_ctl_flush(struct drm_plane *plane, struct dpu_hw_ctl *ctl,
     82		u32 *flush_sspp);
     83
     84/**
     85 * dpu_plane_flush - final plane operations before commit flush
     86 * @plane: Pointer to drm plane structure
     87 */
     88void dpu_plane_flush(struct drm_plane *plane);
     89
     90/**
     91 * dpu_plane_set_error: enable/disable error condition
     92 * @plane: pointer to drm_plane structure
     93 */
     94void dpu_plane_set_error(struct drm_plane *plane, bool error);
     95
     96/**
     97 * dpu_plane_init - create new dpu plane for the given pipe
     98 * @dev:   Pointer to DRM device
     99 * @pipe:  dpu hardware pipe identifier
    100 * @type:  Plane type - PRIMARY/OVERLAY/CURSOR
    101 * @possible_crtcs: bitmask of crtc that can be attached to the given pipe
    102 * @master_plane_id: primary plane id of a multirect pipe. 0 value passed for
    103 *                   a regular plane initialization. A non-zero primary plane
    104 *                   id will be passed for a virtual pipe initialization.
    105 *
    106 */
    107struct drm_plane *dpu_plane_init(struct drm_device *dev,
    108		uint32_t pipe, enum drm_plane_type type,
    109		unsigned long possible_crtcs, u32 master_plane_id);
    110
    111/**
    112 * dpu_plane_validate_multirecti_v2 - validate the multirect planes
    113 *				      against hw limitations
    114 * @plane: drm plate states of the multirect pair
    115 */
    116int dpu_plane_validate_multirect_v2(struct dpu_multirect_plane_states *plane);
    117
    118/**
    119 * dpu_plane_clear_multirect - clear multirect bits for the given pipe
    120 * @drm_state: Pointer to DRM plane state
    121 */
    122void dpu_plane_clear_multirect(const struct drm_plane_state *drm_state);
    123
    124/**
    125 * dpu_plane_color_fill - enables color fill on plane
    126 * @plane:  Pointer to DRM plane object
    127 * @color:  RGB fill color value, [23..16] Blue, [15..8] Green, [7..0] Red
    128 * @alpha:  8-bit fill alpha value, 255 selects 100% alpha
    129 * Returns: 0 on success
    130 */
    131int dpu_plane_color_fill(struct drm_plane *plane,
    132		uint32_t color, uint32_t alpha);
    133
    134#ifdef CONFIG_DEBUG_FS
    135void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable);
    136#else
    137static inline void dpu_plane_danger_signal_ctrl(struct drm_plane *plane, bool enable) {}
    138#endif
    139
    140#endif /* _DPU_PLANE_H_ */