cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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sfpb.xml.h (4100B)


      1#ifndef SFPB_XML
      2#define SFPB_XML
      3
      4/* Autogenerated file, DO NOT EDIT manually!
      5
      6This file was generated by the rules-ng-ng headergen tool in this git repository:
      7http://github.com/freedreno/envytools/
      8git clone https://github.com/freedreno/envytools.git
      9
     10The rules-ng-ng source files this header was generated from are:
     11- /home/robclark/tmp/mesa/src/freedreno/registers/msm.xml                   (    944 bytes, from 2022-03-03 01:18:13)
     12- /home/robclark/tmp/mesa/src/freedreno/registers/freedreno_copyright.xml   (   1572 bytes, from 2020-12-31 19:26:32)
     13- /home/robclark/tmp/mesa/src/freedreno/registers/mdp/mdp4.xml              (  20912 bytes, from 2021-01-30 18:25:22)
     14- /home/robclark/tmp/mesa/src/freedreno/registers/mdp/mdp_common.xml        (   2849 bytes, from 2021-01-30 18:25:22)
     15- /home/robclark/tmp/mesa/src/freedreno/registers/mdp/mdp5.xml              (  37461 bytes, from 2021-01-30 18:25:22)
     16- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi.xml               (  17560 bytes, from 2021-09-16 22:37:02)
     17- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_v2.xml        (   3236 bytes, from 2021-07-22 15:21:56)
     18- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_28nm_8960.xml (   4935 bytes, from 2021-07-22 15:21:56)
     19- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_28nm.xml      (   7004 bytes, from 2021-07-22 15:21:56)
     20- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_20nm.xml      (   3712 bytes, from 2021-07-22 15:21:56)
     21- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_14nm.xml      (   5381 bytes, from 2021-07-22 15:21:56)
     22- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_10nm.xml      (   4499 bytes, from 2021-07-22 15:21:56)
     23- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/dsi_phy_7nm.xml       (  11007 bytes, from 2022-03-03 01:18:13)
     24- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/sfpb.xml              (    602 bytes, from 2021-01-30 18:25:22)
     25- /home/robclark/tmp/mesa/src/freedreno/registers/dsi/mmss_cc.xml           (   1686 bytes, from 2021-01-30 18:25:22)
     26- /home/robclark/tmp/mesa/src/freedreno/registers/hdmi/qfprom.xml           (    600 bytes, from 2021-01-30 18:25:22)
     27- /home/robclark/tmp/mesa/src/freedreno/registers/hdmi/hdmi.xml             (  41874 bytes, from 2021-01-30 18:25:22)
     28- /home/robclark/tmp/mesa/src/freedreno/registers/edp/edp.xml               (  10416 bytes, from 2021-01-30 18:25:22)
     29
     30Copyright (C) 2013-2021 by the following authors:
     31- Rob Clark <robdclark@gmail.com> (robclark)
     32- Ilia Mirkin <imirkin@alum.mit.edu> (imirkin)
     33
     34Permission is hereby granted, free of charge, to any person obtaining
     35a copy of this software and associated documentation files (the
     36"Software"), to deal in the Software without restriction, including
     37without limitation the rights to use, copy, modify, merge, publish,
     38distribute, sublicense, and/or sell copies of the Software, and to
     39permit persons to whom the Software is furnished to do so, subject to
     40the following conditions:
     41
     42The above copyright notice and this permission notice (including the
     43next paragraph) shall be included in all copies or substantial
     44portions of the Software.
     45
     46THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
     47EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
     48MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.
     49IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE
     50LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION
     51OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
     52WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
     53*/
     54
     55
     56enum sfpb_ahb_arb_master_port_en {
     57	SFPB_MASTER_PORT_ENABLE = 3,
     58	SFPB_MASTER_PORT_DISABLE = 0,
     59};
     60
     61#define REG_SFPB_GPREG						0x00000058
     62#define SFPB_GPREG_MASTER_PORT_EN__MASK				0x00001800
     63#define SFPB_GPREG_MASTER_PORT_EN__SHIFT			11
     64static inline uint32_t SFPB_GPREG_MASTER_PORT_EN(enum sfpb_ahb_arb_master_port_en val)
     65{
     66	return ((val) << SFPB_GPREG_MASTER_PORT_EN__SHIFT) & SFPB_GPREG_MASTER_PORT_EN__MASK;
     67}
     68
     69
     70#endif /* SFPB_XML */