cachepc-linux

Fork of AMDESE/linux with modifications for CachePC side-channel attack
git clone https://git.sinitax.com/sinitax/cachepc-linux
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disp.h (4488B)


      1/* SPDX-License-Identifier: MIT */
      2#ifndef __NV04_DISPLAY_H__
      3#define __NV04_DISPLAY_H__
      4#include <subdev/bios.h>
      5#include <subdev/bios/pll.h>
      6
      7#include "nouveau_display.h"
      8
      9struct nouveau_encoder;
     10
     11enum nv04_fp_display_regs {
     12	FP_DISPLAY_END,
     13	FP_TOTAL,
     14	FP_CRTC,
     15	FP_SYNC_START,
     16	FP_SYNC_END,
     17	FP_VALID_START,
     18	FP_VALID_END
     19};
     20
     21struct nv04_crtc_reg {
     22	unsigned char MiscOutReg;
     23	uint8_t CRTC[0xa0];
     24	uint8_t CR58[0x10];
     25	uint8_t Sequencer[5];
     26	uint8_t Graphics[9];
     27	uint8_t Attribute[21];
     28	unsigned char DAC[768];
     29
     30	/* PCRTC regs */
     31	uint32_t fb_start;
     32	uint32_t crtc_cfg;
     33	uint32_t cursor_cfg;
     34	uint32_t gpio_ext;
     35	uint32_t crtc_830;
     36	uint32_t crtc_834;
     37	uint32_t crtc_850;
     38	uint32_t crtc_eng_ctrl;
     39
     40	/* PRAMDAC regs */
     41	uint32_t nv10_cursync;
     42	struct nvkm_pll_vals pllvals;
     43	uint32_t ramdac_gen_ctrl;
     44	uint32_t ramdac_630;
     45	uint32_t ramdac_634;
     46	uint32_t tv_setup;
     47	uint32_t tv_vtotal;
     48	uint32_t tv_vskew;
     49	uint32_t tv_vsync_delay;
     50	uint32_t tv_htotal;
     51	uint32_t tv_hskew;
     52	uint32_t tv_hsync_delay;
     53	uint32_t tv_hsync_delay2;
     54	uint32_t fp_horiz_regs[7];
     55	uint32_t fp_vert_regs[7];
     56	uint32_t dither;
     57	uint32_t fp_control;
     58	uint32_t dither_regs[6];
     59	uint32_t fp_debug_0;
     60	uint32_t fp_debug_1;
     61	uint32_t fp_debug_2;
     62	uint32_t fp_margin_color;
     63	uint32_t ramdac_8c0;
     64	uint32_t ramdac_a20;
     65	uint32_t ramdac_a24;
     66	uint32_t ramdac_a34;
     67	uint32_t ctv_regs[38];
     68};
     69
     70struct nv04_output_reg {
     71	uint32_t output;
     72	int head;
     73};
     74
     75struct nv04_mode_state {
     76	struct nv04_crtc_reg crtc_reg[2];
     77	uint32_t pllsel;
     78	uint32_t sel_clk;
     79};
     80
     81struct nv04_display {
     82	struct nv04_mode_state mode_reg;
     83	struct nv04_mode_state saved_reg;
     84	uint32_t saved_vga_font[4][16384];
     85	uint32_t dac_users[4];
     86	struct nouveau_bo *image[2];
     87	struct nvif_notify flip;
     88};
     89
     90static inline struct nv04_display *
     91nv04_display(struct drm_device *dev)
     92{
     93	return nouveau_display(dev)->priv;
     94}
     95
     96/* nv04_display.c */
     97int nv04_display_create(struct drm_device *);
     98struct nouveau_connector *
     99nv04_encoder_get_connector(struct nouveau_encoder *nv_encoder);
    100
    101/* nv04_crtc.c */
    102int nv04_crtc_create(struct drm_device *, int index);
    103
    104/* nv04_dac.c */
    105int nv04_dac_create(struct drm_connector *, struct dcb_output *);
    106uint32_t nv17_dac_sample_load(struct drm_encoder *encoder);
    107int nv04_dac_output_offset(struct drm_encoder *encoder);
    108void nv04_dac_update_dacclk(struct drm_encoder *encoder, bool enable);
    109bool nv04_dac_in_use(struct drm_encoder *encoder);
    110
    111/* nv04_dfp.c */
    112int nv04_dfp_create(struct drm_connector *, struct dcb_output *);
    113int nv04_dfp_get_bound_head(struct drm_device *dev, struct dcb_output *dcbent);
    114void nv04_dfp_bind_head(struct drm_device *dev, struct dcb_output *dcbent,
    115			       int head, bool dl);
    116void nv04_dfp_disable(struct drm_device *dev, int head);
    117void nv04_dfp_update_fp_control(struct drm_encoder *encoder, int mode);
    118
    119/* nv04_tv.c */
    120int nv04_tv_identify(struct drm_device *dev, int i2c_index);
    121int nv04_tv_create(struct drm_connector *, struct dcb_output *);
    122
    123/* nv17_tv.c */
    124int nv17_tv_create(struct drm_connector *, struct dcb_output *);
    125
    126/* overlay.c */
    127void nouveau_overlay_init(struct drm_device *dev);
    128
    129static inline bool
    130nv_two_heads(struct drm_device *dev)
    131{
    132	struct nouveau_drm *drm = nouveau_drm(dev);
    133	const int impl = to_pci_dev(dev->dev)->device & 0x0ff0;
    134
    135	if (drm->client.device.info.family >= NV_DEVICE_INFO_V0_CELSIUS && impl != 0x0100 &&
    136	    impl != 0x0150 && impl != 0x01a0 && impl != 0x0200)
    137		return true;
    138
    139	return false;
    140}
    141
    142static inline bool
    143nv_gf4_disp_arch(struct drm_device *dev)
    144{
    145	return nv_two_heads(dev) && (to_pci_dev(dev->dev)->device & 0x0ff0) != 0x0110;
    146}
    147
    148static inline bool
    149nv_two_reg_pll(struct drm_device *dev)
    150{
    151	struct nouveau_drm *drm = nouveau_drm(dev);
    152	const int impl = to_pci_dev(dev->dev)->device & 0x0ff0;
    153
    154	if (impl == 0x0310 || impl == 0x0340 || drm->client.device.info.family >= NV_DEVICE_INFO_V0_CURIE)
    155		return true;
    156	return false;
    157}
    158
    159static inline bool
    160nv_match_device(struct drm_device *dev, unsigned device,
    161		unsigned sub_vendor, unsigned sub_device)
    162{
    163	struct pci_dev *pdev = to_pci_dev(dev->dev);
    164
    165	return pdev->device == device &&
    166		pdev->subsystem_vendor == sub_vendor &&
    167		pdev->subsystem_device == sub_device;
    168}
    169
    170#include <subdev/bios/init.h>
    171
    172static inline void
    173nouveau_bios_run_init_table(struct drm_device *dev, u16 table,
    174			    struct dcb_output *outp, int crtc)
    175{
    176	nvbios_init(&nvxx_bios(&nouveau_drm(dev)->client.device)->subdev, table,
    177		init.outp = outp;
    178		init.head = crtc;
    179	);
    180}
    181
    182int nv04_flip_complete(struct nvif_notify *);
    183#endif